public:
/** Constructs a DefaultIEW with the given parameters. */
- DefaultIEW(Params *params);
+ DefaultIEW(O3CPU *_cpu, Params *params);
/** Returns the name of the DefaultIEW stage. */
std::string name() const;
/** Returns the dcache port. */
Port *getDcachePort() { return ldstQueue.getDcachePort(); }
- /** Sets CPU pointer for IEW, IQ, and LSQ. */
- void setCPU(O3CPU *cpu_ptr);
-
/** Sets main time buffer used for backwards communication. */
void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
/** Scoreboard pointer. */
Scoreboard* scoreboard;
- public:
- /** Instruction queue. */
- IQ instQueue;
-
- /** Load / store queue. */
- LSQ ldstQueue;
-
- /** Pointer to the functional unit pool. */
- FUPool *fuPool;
-
private:
/** CPU pointer. */
O3CPU *cpu;
void printAvailableInsts();
public:
+ /** Instruction queue. */
+ IQ instQueue;
+
+ /** Load / store queue. */
+ LSQ ldstQueue;
+
+ /** Pointer to the functional unit pool. */
+ FUPool *fuPool;
/** Records if the LSQ needs to be updated on the next cycle, so that
* IEW knows if there will be activity on the next cycle.
*/
/** Records if there is a fetch redirect on this cycle for each thread. */
bool fetchRedirect[Impl::MaxThreads];
- /** Keeps track of the last valid branch delay slot instss for threads */
- InstSeqNum bdelayDoneSeqNum[Impl::MaxThreads];
-
- /** Used to track if all instructions have been dispatched this cycle.
- * If they have not, then blocking must have occurred, and the instructions
- * would already be added to the skid buffer.
- * @todo: Fix this hack.
- */
- bool dispatchedAllInsts;
-
/** Records if the queues have been changed (inserted or issued insts),
* so that IEW knows to broadcast the updated amount of free entries.
*/