/*
+ * Copyright (c) 2011-2012, 2014 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2004-2006 The Regents of The University of Michigan
* All rights reserved.
*
#include "mem/port.hh"
#include "sim/sim_object.hh"
-class DerivO3CPUParams;
+struct DerivO3CPUParams;
template <class Impl>
class LSQ {
/** Constructs an LSQ with the given parameters. */
LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
+ ~LSQ() { }
/** Returns the name of the LSQ. */
std::string name() const;
/** Registers statistics of each LSQ unit. */
void regStats();
- /** Returns dcache port.
- * @todo: Dcache port needs to be moved up to this level for SMT
- * to work. For now it just returns the port from one of the
- * threads.
- */
- Port *getDcachePort() { return &dcachePort; }
-
/** Sets the pointer to the list of active threads. */
void setActiveThreads(std::list<ThreadID> *at_ptr);
- /** Switches out the LSQ. */
- void switchOut();
+
+ /** Perform sanity checks after a drain. */
+ void drainSanityCheck() const;
+ /** Has the LSQ drained? */
+ bool isDrained() const;
/** Takes over execution from another CPU's thread. */
void takeOverFrom();
{ thread[tid].tick(); }
/** Inserts a load into the LSQ. */
- void insertLoad(DynInstPtr &load_inst);
+ void insertLoad(const DynInstPtr &load_inst);
/** Inserts a store into the LSQ. */
- void insertStore(DynInstPtr &store_inst);
+ void insertStore(const DynInstPtr &store_inst);
/** Executes a load. */
- Fault executeLoad(DynInstPtr &inst);
+ Fault executeLoad(const DynInstPtr &inst);
/** Executes a store. */
- Fault executeStore(DynInstPtr &inst);
+ Fault executeStore(const DynInstPtr &inst);
/**
* Commits loads up until the given sequence number for a specific thread.
bool violation(ThreadID tid)
{ return thread[tid].violation(); }
- /** Returns if a load is blocked due to the memory system for a specific
- * thread.
- */
- bool loadBlocked(ThreadID tid)
- { return thread[tid].loadBlocked(); }
-
- bool isLoadBlockedHandled(ThreadID tid)
- { return thread[tid].isLoadBlockedHandled(); }
-
- void setLoadBlockedHandled(ThreadID tid)
- { thread[tid].setLoadBlockedHandled(); }
-
/** Gets the instruction that caused the memory ordering violation. */
DynInstPtr getMemDepViolator(ThreadID tid)
{ return thread[tid].getMemDepViolator(); }
int numStores(ThreadID tid)
{ return thread[tid].numStores(); }
- /** Returns the total number of loads that are ready. */
- int numLoadsReady();
- /** Returns the number of loads that are ready for a single thread. */
- int numLoadsReady(ThreadID tid)
- { return thread[tid].numLoadsReady(); }
+ /** Returns the number of free load entries. */
+ unsigned numFreeLoadEntries();
+
+ /** Returns the number of free store entries. */
+ unsigned numFreeStoreEntries();
- /** Returns the number of free entries. */
- unsigned numFreeEntries();
/** Returns the number of free entries for a specific thread. */
unsigned numFreeEntries(ThreadID tid);
+ /** Returns the number of free entries in the LQ for a specific thread. */
+ unsigned numFreeLoadEntries(ThreadID tid);
+
+ /** Returns the number of free entries in the SQ for a specific thread. */
+ unsigned numFreeStoreEntries(ThreadID tid);
+
/** Returns if the LSQ is full (either LQ or SQ is full). */
bool isFull();
/**
*/
bool isFull(ThreadID tid);
+ /** Returns if the LSQ is empty (both LQ and SQ are empty). */
+ bool isEmpty() const;
+ /** Returns if all of the LQs are empty. */
+ bool lqEmpty() const;
+ /** Returns if all of the SQs are empty. */
+ bool sqEmpty() const;
+
/** Returns if any of the LQs are full. */
bool lqFull();
/** Returns if the LQ of a given thread is full. */
bool willWB(ThreadID tid)
{ return thread[tid].willWB(); }
- /** Returns if the cache is currently blocked. */
- bool cacheBlocked()
- { return retryTid != InvalidThreadID; }
-
- /** Sets the retry thread id, indicating that one of the LSQUnits
- * tried to access the cache but the cache was blocked. */
- void setRetryTid(ThreadID tid)
- { retryTid = tid; }
-
/** Debugging function to print out all instructions. */
- void dumpInsts();
+ void dumpInsts() const;
/** Debugging function to print out instructions from a specific thread. */
- void dumpInsts(ThreadID tid)
+ void dumpInsts(ThreadID tid) const
{ thread[tid].dumpInsts(); }
/** Executes a read operation, using the load specified at the load
* index.
*/
- Fault read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- uint8_t *data, int load_idx);
+ Fault read(const RequestPtr &req,
+ RequestPtr &sreqLow, RequestPtr &sreqHigh,
+ int load_idx);
/** Executes a store operation, using the store specified at the store
* index.
*/
- Fault write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
+ Fault write(const RequestPtr &req,
+ const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
uint8_t *data, int store_idx);
- /** The CPU pointer. */
- O3CPU *cpu;
-
- /** The IEW stage pointer. */
- IEW *iewStage;
-
- /** DcachePort class for this LSQ. Handles doing the
- * communication with the cache/memory.
+ /**
+ * Retry the previous send that failed.
*/
- class DcachePort : public Port
- {
- protected:
- /** Pointer to LSQ. */
- LSQ *lsq;
+ void recvReqRetry();
- public:
- /** Default constructor. */
- DcachePort(LSQ *_lsq)
- : Port(_lsq->name() + "-dport", _lsq->cpu), lsq(_lsq)
- { }
-
- bool snoopRangeSent;
-
- virtual void setPeer(Port *port);
-
- protected:
- /** Atomic version of receive. Panics. */
- virtual Tick recvAtomic(PacketPtr pkt);
-
- /** Functional version of receive. Panics. */
- virtual void recvFunctional(PacketPtr pkt);
-
- /** Receives status change. Other than range changing, panics. */
- virtual void recvStatusChange(Status status);
-
- /** Returns the address ranges of this device. */
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- bool &snoop)
- { resp.clear(); snoop = true; }
+ /**
+ * Handles writing back and completing the load or store that has
+ * returned from memory.
+ *
+ * @param pkt Response packet from the memory sub-system
+ */
+ bool recvTimingResp(PacketPtr pkt);
- /** Timing version of receive. Handles writing back and
- * completing the load or store that has returned from
- * memory. */
- virtual bool recvTiming(PacketPtr pkt);
+ void recvTimingSnoopReq(PacketPtr pkt);
- /** Handles doing a retry of the previous send. */
- virtual void recvRetry();
- };
-
- /** D-cache port. */
- DcachePort dcachePort;
+ /** The CPU pointer. */
+ O3CPU *cpu;
- /** Tell the CPU to update the Phys and Virt ports. */
- void updateMemPorts() { cpu->updateMemPorts(); }
+ /** The IEW stage pointer. */
+ IEW *iewStage;
protected:
/** The LSQ policy for SMT mode. */
LSQPolicy lsqPolicy;
- /** The LSQ units for individual threads. */
- LSQUnit thread[Impl::MaxThreads];
+ /** Transform a SMT sharing policy string into a LSQPolicy value. */
+ static LSQPolicy readLSQPolicy(const std::string& policy) {
+ std::string policy_ = policy;
+ std::transform(policy_.begin(), policy_.end(), policy_.begin(),
+ (int(*)(int)) tolower);
+ if (policy_ == "dynamic") {
+ return Dynamic;
+ } else if (policy_ == "partitioned") {
+ return Partitioned;
+ } else if (policy_ == "threshold") {
+ return Threshold;
+ }
+ assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
+ "Partitioned, Threshold}");
+
+ // Some compilers complain if there is no return.
+ return Dynamic;
+ }
+
+ /** Auxiliary function to calculate per-thread max LSQ allocation limit.
+ * Depending on a policy, number of entries and possibly number of threads
+ * and threshold, this function calculates how many resources each thread
+ * can occupy at most.
+ */
+ static uint32_t maxLSQAllocation(const LSQPolicy& pol, uint32_t entries,
+ uint32_t numThreads, uint32_t SMTThreshold) {
+ if (pol == Dynamic) {
+ return entries;
+ } else if (pol == Partitioned) {
+ //@todo:make work if part_amt doesnt divide evenly.
+ return entries / numThreads;
+ } else if (pol == Threshold) {
+ //Divide up by threshold amount
+ //@todo: Should threads check the max and the total
+ //amount of the LSQ
+ return SMTThreshold;
+ }
+ return 0;
+ }
/** List of Active Threads in System. */
std::list<ThreadID> *activeThreads;
/** Max SQ Size - Used to Enforce Sharing Policies. */
unsigned maxSQEntries;
+ /** The LSQ units for individual threads. */
+ std::vector<LSQUnit> thread;
+
/** Number of Threads. */
ThreadID numThreads;
-
- /** The thread id of the LSQ Unit that is currently waiting for a
- * retry. */
- ThreadID retryTid;
};
template <class Impl>
Fault
-LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- uint8_t *data, int load_idx)
+LSQ<Impl>::read(const RequestPtr &req,
+ RequestPtr &sreqLow, RequestPtr &sreqHigh,
+ int load_idx)
{
- ThreadID tid = req->threadId();
+ ThreadID tid = cpu->contextToThread(req->contextId());
- return thread[tid].read(req, sreqLow, sreqHigh, data, load_idx);
+ return thread[tid].read(req, sreqLow, sreqHigh, load_idx);
}
template <class Impl>
Fault
-LSQ<Impl>::write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
+LSQ<Impl>::write(const RequestPtr &req,
+ const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
uint8_t *data, int store_idx)
{
- ThreadID tid = req->threadId();
+ ThreadID tid = cpu->contextToThread(req->contextId());
return thread[tid].write(req, sreqLow, sreqHigh, data, store_idx);
}
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