CPU: Get rid of the now unnecessary getInst/setInst family of functions.

[gem5.git] / src / cpu / ozone / cpu_impl.hh

diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 25fa6407105e8e62684aa26f32dec1c66b9ba99f..08da1724bbc737d13c598c136cee90a11ce2854f 100644 (file)
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -34,6 +34,7 @@
 
 #include "arch/isa_traits.hh" // For MachInst
 #include "base/trace.hh"
+#include "config/the_isa.hh"
 #include "cpu/base.hh"
 #include "cpu/simple_thread.hh"
 #include "cpu/thread_context.hh"
@@ -770,7 +771,6 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
     setCpuId(old_context->cpuId());
     setContextId(old_context->contextId());
 
-    thread->setInst(old_context->getInst());
 #if !FULL_SYSTEM
     setFuncExeInst(old_context->readFuncExeInst());
 #else
@@ -861,13 +861,6 @@ OzoneCPU<Impl>::OzoneTC::threadId()
     return thread->threadId();
 }
 
-template <class Impl>
-TheISA::MachInst
-OzoneCPU<Impl>::OzoneTC::getInst()
-{
-    return thread->getInst();
-}
-
 template <class Impl>
 void
 OzoneCPU<Impl>::OzoneTC::copyArchRegs(ThreadContext *tc)
@@ -917,22 +910,6 @@ OzoneCPU<Impl>::OzoneTC::readIntReg(int reg_idx)
     return thread->renameTable[reg_idx]->readIntResult();
 }
 
-template <class Impl>
-TheISA::FloatReg
-OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    switch(width) {
-      case 32:
-        return thread->renameTable[idx]->readFloatResult();
-      case 64:
-        return thread->renameTable[idx]->readDoubleResult();
-      default:
-        panic("Unsupported width!");
-        return 0;
-    }
-}
-
 template <class Impl>
 double
 OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
@@ -941,14 +918,6 @@ OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
     return thread->renameTable[idx]->readFloatResult();
 }
 
-template <class Impl>
-uint64_t
-OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    return thread->renameTable[idx]->readIntResult();
-}
-
 template <class Impl>
 uint64_t
 OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx)
@@ -968,27 +937,6 @@ OzoneCPU<Impl>::OzoneTC::setIntReg(int reg_idx, uint64_t val)
     }
 }
 
-template <class Impl>
-void
-OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    switch(width) {
-      case 32:
-        panic("Unimplemented!");
-        break;
-      case 64:
-        thread->renameTable[idx]->setDoubleResult(val);
-        break;
-      default:
-        panic("Unsupported width!");
-    }
-
-    if (!thread->inSyscall) {
-        cpu->squashFromTC();
-    }
-}
-
 template <class Impl>
 void
 OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
@@ -1002,14 +950,6 @@ OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
     }
 }
 
-template <class Impl>
-void
-OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val,
-                                         int width)
-{
-    panic("Unimplemented!");
-}
-
 template <class Impl>
 void
 OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val)