CPU: Get rid of the now unnecessary getInst/setInst family of functions.

[gem5.git] / src / cpu / ozone / dyn_inst.hh

diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index 88f96b14b4a773f3aab734afe904698d2e79e778..cca72ef18fcc4023b18a023e5cd8391b535543a3 100644 (file)
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -34,6 +34,7 @@
 #include "arch/isa_traits.hh"
 #include "arch/types.hh"
 #include "config/full_system.hh"
+#include "config/the_isa.hh"
 #include "cpu/base_dyn_inst.hh"
 #include "cpu/inst_seq.hh"
 #include "cpu/ozone/cpu.hh"   // MUST include this
@@ -151,28 +152,14 @@ class OzoneDynInst : public BaseDynInst<Impl>
         return srcInsts[idx]->readIntResult();
     }
 
-    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
-    {
-        switch(width) {
-          case 32:
-            return srcInsts[idx]->readFloatResult();
-          case 64:
-            return srcInsts[idx]->readDoubleResult();
-          default:
-            panic("Width not supported");
-            return 0;
-        }
-    }
-
     FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         return srcInsts[idx]->readFloatResult();
     }
 
-    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
-                                         int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
-        return srcInsts[idx]->readIntResult();
+        return srcInsts[idx]->readFloatResult();
     }
 
     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
@@ -188,23 +175,11 @@ class OzoneDynInst : public BaseDynInst<Impl>
         BaseDynInst<Impl>::setIntReg(si, idx, val);
     }
 
-    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
-                            int width)
-    {
-        BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
-    }
-
     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         BaseDynInst<Impl>::setFloatReg(si, idx, val);
     }
 
-    void setFloatRegOperandBits(const StaticInst *si, int idx,
-                                FloatRegBits val, int width)
-    {
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
-    }
-
     void setFloatRegOperandBits(const StaticInst *si, int idx,
                                 FloatRegBits val)
     {
@@ -231,14 +206,14 @@ class OzoneDynInst : public BaseDynInst<Impl>
 
   public:
     // ISA stuff
+    MiscReg readMiscRegNoEffect(int misc_reg);
+
     MiscReg readMiscReg(int misc_reg);
 
-    MiscReg readMiscRegWithEffect(int misc_reg);
+    void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
 
     void setMiscReg(int misc_reg, const MiscReg &val);
 
-    void setMiscRegWithEffect(int misc_reg, const MiscReg &val);
-
 #if FULL_SYSTEM
     Fault hwrei();
     void trap(Fault fault);