CPU: Get rid of the now unnecessary getInst/setInst family of functions.

[gem5.git] / src / cpu / ozone / inorder_back_end_impl.hh

diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 8d7ebb60ec46fe3ab89f48da616b683f24cd9c41..b48e8f6924e15fee6f66befaf1a244b66b9b57c0 100644 (file)
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -30,6 +30,7 @@
 
 #include "sim/faults.hh"
 #include "arch/types.hh"
+#include "config/the_isa.hh"
 #include "cpu/ozone/inorder_back_end.hh"
 #include "cpu/ozone/thread_state.hh"
 
@@ -149,8 +150,7 @@ InorderBackEnd<Impl>::tick()
     // if (interrupt) then set thread PC, stall front end, record that
     // I'm waiting for it to drain.  (for now just squash)
 #if FULL_SYSTEM
-    if (interruptBlocked ||
-        cpu->check_interrupts(tc)) {
+    if (interruptBlocked || cpu->checkInterrupts(tc)) {
         if (!robEmpty()) {
             interruptBlocked = true;
         //AlphaDep
@@ -304,12 +304,6 @@ InorderBackEnd<Impl>::executeInsts()
 
             thread->inSyscall = true;
 
-            // Hack for now; DTB will sometimes need the machine instruction
-            // for when faults happen.  So we will set it here, prior to the
-            // DTB possibly needing it for this translation.
-            thread->setInst(
-                static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
             // Consider holding onto the trap and waiting until the trap event
             // happens for this to be executed.
             inst_fault->invoke(xc);
@@ -538,7 +532,7 @@ InorderBackEnd<Impl>::DCacheCompletionEvent::process()
 
 template <class Impl>
 const char *
-InorderBackEnd<Impl>::DCacheCompletionEvent::description()
+InorderBackEnd<Impl>::DCacheCompletionEvent::description() const
 {
-    return "DCache completion event";
+    return "DCache completion";
 }