#include "sim/faults.hh"
#include "arch/types.hh"
+#include "config/the_isa.hh"
#include "cpu/ozone/inorder_back_end.hh"
#include "cpu/ozone/thread_state.hh"
// if (interrupt) then set thread PC, stall front end, record that
// I'm waiting for it to drain. (for now just squash)
#if FULL_SYSTEM
- if (interruptBlocked ||
- cpu->check_interrupts(tc)) {
+ if (interruptBlocked || cpu->checkInterrupts(tc)) {
if (!robEmpty()) {
interruptBlocked = true;
//AlphaDep
thread->inSyscall = true;
- // Hack for now; DTB will sometimes need the machine instruction
- // for when faults happen. So we will set it here, prior to the
- // DTB possibly needing it for this translation.
- thread->setInst(
- static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
// Consider holding onto the trap and waiting until the trap event
// happens for this to be executed.
inst_fault->invoke(xc);
template <class Impl>
const char *
-InorderBackEnd<Impl>::DCacheCompletionEvent::description()
+InorderBackEnd<Impl>::DCacheCompletionEvent::description() const
{
return "DCache completion";
}