includes: sort all includes
[gem5.git] / src / cpu / ozone / lw_lsq.hh
index ba40e9ce1c459e59d012d148ab3f5cb100b10074..4817622f5497bc2efb80952f81de5b9685f901ca 100644 (file)
 #ifndef __CPU_OZONE_LW_LSQ_HH__
 #define __CPU_OZONE_LW_LSQ_HH__
 
+#include <algorithm>
 #include <list>
 #include <map>
 #include <queue>
-#include <algorithm>
 
 #include "arch/faults.hh"
 #include "arch/types.hh"
-#include "config/full_system.hh"
+#include "base/fast_alloc.hh"
 #include "base/hashmap.hh"
+#include "config/full_system.hh"
+#include "config/the_isa.hh"
 #include "cpu/inst_seq.hh"
 #include "mem/packet.hh"
 #include "mem/port.hh"
@@ -301,7 +303,7 @@ class OzoneLWLSQ {
     };
 
     /** Derived class to hold any sender state the LSQ needs. */
-    class LSQSenderState : public Packet::SenderState
+    class LSQSenderState : public Packet::SenderState, public FastAlloc
     {
       public:
         /** Default constructor. */
@@ -329,7 +331,7 @@ class OzoneLWLSQ {
         void process();
 
         /** Returns the description of this event. */
-        const char *description();
+        const char *description() const;
 
       private:
         /** Instruction whose results are being written back. */
@@ -410,9 +412,9 @@ class OzoneLWLSQ {
     //list<InstSeqNum> mshrSeqNums;
 
     /** Tota number of memory ordering violations. */
-    Stats::Scalar<> lsqMemOrderViolation;
+    Stats::Scalar lsqMemOrderViolation;
 
-     //Stats::Scalar<> dcacheStallCycles;
+     //Stats::Scalar dcacheStallCycles;
     Counter lastDcacheStall;
 
     // Make these per thread?
@@ -579,7 +581,7 @@ OzoneLWLSQ<Impl>::read(RequestPtr req, T &data, int load_idx)
             // We'll say this has a 1 cycle load-store forwarding latency
             // for now.
             // @todo: Need to make this a parameter.
-            wb->schedule(curTick);
+            wb->schedule(curTick());
 
             // Should keep track of stat for forwarded data
             return NoFault;
@@ -634,7 +636,7 @@ OzoneLWLSQ<Impl>::read(RequestPtr req, T &data, int load_idx)
 
     PacketPtr data_pkt =
         new Packet(req,
-                   (req->isLocked() ?
+                   (req->isLLSC() ?
                     MemCmd::LoadLockedReq : Packet::ReadReq),
                    Packet::Broadcast);
     data_pkt->dataStatic(inst->memData);
@@ -661,7 +663,7 @@ OzoneLWLSQ<Impl>::read(RequestPtr req, T &data, int load_idx)
         return NoFault;
     }
 
-    if (req->isLocked()) {
+    if (req->isLLSC()) {
         cpu->lockFlag = true;
     }