changes regarding fs.py

[gem5.git] / src / cpu / quiesce_event.hh

diff --git a/src/cpu/quiesce_event.hh b/src/cpu/quiesce_event.hh
index 18e88ecce6edf62018142f3fcd9a32745c785bd3..3de40f97ea5c10ea2ee2bc41963d9808813a8fa9 100644 (file)
--- a/src/cpu/quiesce_event.hh
+++ b/src/cpu/quiesce_event.hh
@@ -1,17 +1,47 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Kevin Lim
+ */
+
 #ifndef __CPU_QUIESCE_EVENT_HH__
 #define __CPU_QUIESCE_EVENT_HH__
 
 #include "sim/eventq.hh"
 
-class ExecContext;
+class ThreadContext;
 
 /** Event for timing out quiesce instruction */
 struct EndQuiesceEvent : public Event
 {
-    /** A pointer to the execution context that is quiesced */
-    ExecContext *xc;
+    /** A pointer to the thread context that is quiesced */
+    ThreadContext *tc;
 
-    EndQuiesceEvent(ExecContext *_xc);
+    EndQuiesceEvent(ThreadContext *_tc);
 
     /** Event process to occur at interrupt*/
     virtual void process();