from m5.params import *
from BaseSimpleCPU import BaseSimpleCPU
+from SimPoint import SimPoint
class AtomicSimpleCPU(BaseSimpleCPU):
"""Simple CPU model executing a configurable number of
simulate_data_stalls = Param.Bool(False, "Simulate dcache stall cycles")
simulate_inst_stalls = Param.Bool(False, "Simulate icache stall cycles")
fastmem = Param.Bool(False, "Access memory directly")
+
+ def addSimPointProbe(self, interval):
+ simpoint = SimPoint()
+ simpoint.interval = interval
+ self.probeListener = simpoint