#define __CPU_SIMPLE_ATOMIC_HH__
#include "cpu/simple/base.hh"
+#include "params/AtomicSimpleCPU.hh"
class AtomicSimpleCPU : public BaseSimpleCPU
{
public:
- struct Params : public BaseSimpleCPU::Params {
- int width;
- bool simulate_stalls;
- };
-
- AtomicSimpleCPU(Params *params);
+ AtomicSimpleCPU(AtomicSimpleCPUParams *params);
virtual ~AtomicSimpleCPU();
virtual void init();
- public:
- //
- enum Status {
- Running,
- Idle,
- SwitchedOut
- };
-
- protected:
- Status _status;
-
- Status status() const { return _status; }
-
private:
struct TickEvent : public Event
TickEvent(AtomicSimpleCPU *c);
void process();
- const char *description();
+ const char *description() const;
};
TickEvent tickEvent;
const int width;
- const bool simulate_stalls;
+ bool locked;
+ const bool simulate_data_stalls;
+ const bool simulate_inst_stalls;
// main simulation loop (one cycle)
void tick();
};
DcachePort dcachePort;
+ CpuPort physmemPort;
+ bool hasPhysMemPort;
Request ifetch_req;
Request data_read_req;
Request data_write_req;
bool dcache_access;
Tick dcache_latency;
+ Range<Addr> physMemAddr;
+
public:
virtual Port *getPort(const std::string &if_name, int idx = -1);
virtual void activateContext(int thread_num, int delay);
virtual void suspendContext(int thread_num);
- template <class T>
- Fault read(Addr addr, T &data, unsigned flags);
+ Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
+
+ Fault writeMem(uint8_t *data, unsigned size,
+ Addr addr, unsigned flags, uint64_t *res);
- template <class T>
- Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
+ /**
+ * Print state of address in memory system via PrintReq (for
+ * debugging).
+ */
+ void printAddr(Addr a);
};
#endif // __CPU_SIMPLE_ATOMIC_HH__