CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable

[gem5.git] / src / cpu / simple / base.hh

diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 2696cc395e2e57dda53e3bc1f77f049086132ea8..67fbccf98d801838bfdf7baef589b7fb75b7e94f 100644 (file)
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2011 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -35,9 +47,10 @@
 
 #include "arch/predecoder.hh"
 #include "base/statistics.hh"
-#include "config/full_system.hh"
 #include "config/the_isa.hh"
 #include "cpu/base.hh"
+#include "cpu/checker/cpu.hh"
+#include "cpu/decode.hh"
 #include "cpu/pc_event.hh"
 #include "cpu/simple_thread.hh"
 #include "cpu/static_inst.hh"
@@ -45,36 +58,27 @@
 #include "mem/port.hh"
 #include "mem/request.hh"
 #include "sim/eventq.hh"
+#include "sim/full_system.hh"
 #include "sim/system.hh"
 
 // forward declarations
-#if FULL_SYSTEM
-class Processor;
-namespace TheISA
-{
-    class ITB;
-    class DTB;
-}
-class MemObject;
-
-#else
-
+class Checkpoint;
 class Process;
-
-#endif // FULL_SYSTEM
+class Processor;
+class ThreadContext;
 
 namespace TheISA
 {
+    class DTB;
+    class ITB;
     class Predecoder;
 }
-class ThreadContext;
-class Checkpoint;
 
 namespace Trace {
     class InstRecord;
 }
 
-class BaseSimpleCPUParams;
+struct BaseSimpleCPUParams;
 
 
 class BaseSimpleCPU : public BaseCPU
@@ -119,11 +123,15 @@ class BaseSimpleCPU : public BaseCPU
      * objects to modify this thread's state.
      */
     ThreadContext *tc;
+
+    CheckerCPU *checker;
+
   protected:
 
     enum Status {
         Idle,
         Running,
+        Faulting,
         ITBWaitResponse,
         IcacheRetry,
         IcacheWaitResponse,
@@ -139,11 +147,9 @@ class BaseSimpleCPU : public BaseCPU
 
   public:
 
-#if FULL_SYSTEM
     Addr dbg_vtophys(Addr addr);
 
     bool interval_stats;
-#endif
 
     // current instruction
     TheISA::MachInst inst;
@@ -166,8 +172,8 @@ class BaseSimpleCPU : public BaseCPU
     void postExecute();
     void advancePC(Fault fault);
 
-    virtual void deallocateContext(int thread_num);
-    virtual void haltContext(int thread_num);
+    virtual void deallocateContext(ThreadID thread_num);
+    virtual void haltContext(ThreadID thread_num);
 
     // statistics
     virtual void regStats();
@@ -177,20 +183,33 @@ class BaseSimpleCPU : public BaseCPU
     Counter numInst;
     Counter startNumInst;
     Stats::Scalar numInsts;
+    Counter numOp;
+    Counter startNumOp;
+    Stats::Scalar numOps;
 
     void countInst()
     {
-        numInst++;
-        numInsts++;
+        if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
+            numInst++;
+            numInsts++;
+        }
+        numOp++;
+        numOps++;
+
         system->totalNumInsts++;
         thread->funcExeInst++;
     }
 
-    virtual Counter totalInstructions() const
+    virtual Counter totalInsts() const
     {
         return numInst - startNumInst;
     }
 
+    virtual Counter totalOps() const
+    {
+        return numOp - startNumOp;
+    }
+
     //number of integer alu accesses
     Stats::Scalar numIntAluAccesses;
 
@@ -397,12 +416,17 @@ class BaseSimpleCPU : public BaseCPU
 
     //Fault CacheOp(uint8_t Op, Addr EA);
 
-#if FULL_SYSTEM
     Fault hwrei() { return thread->hwrei(); }
     bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
-#else
-    void syscall(int64_t callnum) { thread->syscall(callnum); }
-#endif
+
+    void
+    syscall(int64_t callnum)
+    {
+        if (FullSystem)
+            panic("Syscall emulation isn't available in FS mode.\n");
+
+        thread->syscall(callnum);
+    }
 
     bool misspeculating() { return thread->misspeculating(); }
     ThreadContext *tcBase() { return tc; }