Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done...

[gem5.git] / src / cpu / simple / base.hh

diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 2bc329b68747a0552b8a30dca4464d9ac2be6f9e..aeae1a3d81e0913a58791657eaaf027eb0d48b6e 100644 (file)
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -44,6 +44,7 @@
 #include "mem/port.hh"
 #include "mem/request.hh"
 #include "sim/eventq.hh"
+#include "sim/system.hh"
 
 // forward declarations
 #if FULL_SYSTEM
@@ -75,6 +76,8 @@ namespace Trace {
     class InstRecord;
 }
 
+class BaseSimpleCPUParams;
+
 
 class BaseSimpleCPU : public BaseCPU
 {
@@ -86,6 +89,14 @@ class BaseSimpleCPU : public BaseCPU
   protected:
     Trace::InstRecord *traceData;
 
+    inline void checkPcEventQueue() {
+        Addr oldpc;
+        do {
+            oldpc = thread->readPC();
+            system->pcEventQueue.service(tc);
+        } while (oldpc != thread->readPC());
+    }
+
   public:
     void post_interrupt(int int_num, int index);
 
@@ -98,15 +109,7 @@ class BaseSimpleCPU : public BaseCPU
     };
 
   public:
-    struct Params : public BaseCPU::Params
-    {
-        TheISA::ITB *itb;
-        TheISA::DTB *dtb;
-#if !FULL_SYSTEM
-        Process *process;
-#endif
-    };
-    BaseSimpleCPU(Params *params);
+    BaseSimpleCPU(BaseSimpleCPUParams *params);
     virtual ~BaseSimpleCPU();
 
   public:
@@ -117,6 +120,24 @@ class BaseSimpleCPU : public BaseCPU
      * objects to modify this thread's state.
      */
     ThreadContext *tc;
+  protected:
+    int cpuId;
+
+    enum Status {
+        Idle,
+        Running,
+        IcacheRetry,
+        IcacheWaitResponse,
+        IcacheWaitSwitch,
+        DcacheRetry,
+        DcacheWaitResponse,
+        DcacheWaitSwitch,
+        SwitchedOut
+    };
+
+    Status _status;
+
+  public:
 
 #if FULL_SYSTEM
     Addr dbg_vtophys(Addr addr);
@@ -354,6 +375,21 @@ class BaseSimpleCPU : public BaseCPU
         return thread->setMiscReg(reg_idx, val);
     }
 
+    void demapPage(Addr vaddr, uint64_t asn)
+    {
+        thread->demapPage(vaddr, asn);
+    }
+
+    void demapInstPage(Addr vaddr, uint64_t asn)
+    {
+        thread->demapInstPage(vaddr, asn);
+    }
+
+    void demapDataPage(Addr vaddr, uint64_t asn)
+    {
+        thread->demapDataPage(vaddr, asn);
+    }
+
     unsigned readStCondFailures() {
         return thread->readStCondFailures();
     }
@@ -374,6 +410,8 @@ class BaseSimpleCPU : public BaseCPU
               "register access.\n");
      }
 
+    //Fault CacheOp(uint8_t Op, Addr EA);
+
 #if FULL_SYSTEM
     Fault hwrei() { return thread->hwrei(); }
     void ev5_trap(Fault fault) { fault->invoke(tc); }