#include "mem/fs_translating_port_proxy.hh"
#include "mem/se_translating_port_proxy.hh"
#include "params/BaseCPU.hh"
+#include "sim/faults.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
#include "sim/serialize.hh"
// constructor
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
Process *_process, TheISA::TLB *_itb,
- TheISA::TLB *_dtb)
- : ThreadState(_cpu, _thread_num, _process), system(_sys), itb(_itb),
- dtb(_dtb)
+ TheISA::TLB *_dtb, TheISA::ISA *_isa)
+ : ThreadState(_cpu, _thread_num, _process), isa(_isa),
+ predicate(false), system(_sys),
+ itb(_itb), dtb(_dtb)
{
clearArchRegs();
tc = new ProxyThreadContext<SimpleThread>(this);
}
+
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
TheISA::TLB *_itb, TheISA::TLB *_dtb,
- bool use_kernel_stats)
- : ThreadState(_cpu, _thread_num, NULL), system(_sys), itb(_itb), dtb(_dtb)
+ TheISA::ISA *_isa, bool use_kernel_stats)
+ : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb),
+ dtb(_dtb)
{
tc = new ProxyThreadContext<SimpleThread>(this);
kernelStats = new TheISA::Kernel::Statistics(system);
}
-SimpleThread::SimpleThread()
- : ThreadState(NULL, -1, NULL)
-{
- tc = new ProxyThreadContext<SimpleThread>(this);
-}
-
SimpleThread::~SimpleThread()
{
delete tc;
void
SimpleThread::takeOverFrom(ThreadContext *oldContext)
{
- // some things should already be set up
- if (FullSystem)
- assert(system == oldContext->getSystemPtr());
- assert(process == oldContext->getProcessPtr());
-
- copyState(oldContext);
- if (FullSystem) {
- EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
- if (quiesce) {
- // Point the quiesce event's TC at this TC so that it wakes up
- // the proper CPU.
- quiesce->tc = tc;
- }
- if (quiesceEvent) {
- quiesceEvent->tc = tc;
- }
-
- TheISA::Kernel::Statistics *stats = oldContext->getKernelStats();
- if (stats) {
- kernelStats = stats;
- }
- }
+ ::takeOverFrom(*tc, *oldContext);
+ decoder.takeOverFrom(oldContext->getDecoderPtr());
+ kernelStats = oldContext->getKernelStats();
+ funcExeInst = oldContext->readFuncExeInst();
storeCondFailures = 0;
-
- oldContext->setStatus(ThreadContext::Halted);
-}
-
-void
-SimpleThread::copyTC(ThreadContext *context)
-{
- copyState(context);
-
- if (FullSystem) {
- EndQuiesceEvent *quiesce = context->getQuiesceEvent();
- if (quiesce) {
- quiesceEvent = quiesce;
- }
- TheISA::Kernel::Statistics *stats = context->getKernelStats();
- if (stats) {
- kernelStats = stats;
- }
- }
}
void
SimpleThread::serialize(ostream &os)
{
ThreadState::serialize(os);
- SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
- SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
- _pcState.serialize(os);
- // thread_num and cpu_id are deterministic from the config
-
- //
- // Now must serialize all the ISA dependent state
- //
- isa.serialize(baseCpu, os);
+ ::serialize(*tc, os);
}
SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
{
ThreadState::unserialize(cp, section);
- UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
- UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
- _pcState.unserialize(cp, section);
- // thread_num and cpu_id are deterministic from the config
-
- //
- // Now must unserialize all the ISA dependent state
- //
- isa.unserialize(baseCpu, cp, section);
+ ::unserialize(*tc, cp, section);
+}
+
+void
+SimpleThread::startup()
+{
+ isa->startup(tc);
}
void
}
void
-SimpleThread::activate(int delay)
+SimpleThread::activate()
{
if (status() == ThreadContext::Active)
return;
lastActivate = curTick();
-
-// if (status() == ThreadContext::Unallocated) {
-// cpu->activateWhenReady(_threadId);
-// return;
-// }
-
_status = ThreadContext::Active;
-
- // status() == Suspended
- baseCpu->activateContext(_threadId, delay);
+ baseCpu->activateContext(_threadId);
}
void
TheISA::copyRegs(src_tc, tc);
}
+// The following methods are defined in src/arch/alpha/ev5.cc for
+// Alpha.
+#if THE_ISA != ALPHA_ISA
+Fault
+SimpleThread::hwrei()
+{
+ return NoFault;
+}
+
+bool
+SimpleThread::simPalCheck(int palFunc)
+{
+ return true;
+}
+#endif