#ifndef __CPU_SIMPLE_THREAD_HH__
#define __CPU_SIMPLE_THREAD_HH__
+#include "arch/decoder.hh"
#include "arch/isa.hh"
#include "arch/isa_traits.hh"
#include "arch/registers.hh"
#include "arch/tlb.hh"
#include "arch/types.hh"
#include "base/types.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "config/use_checker.hh"
-#include "cpu/decode.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
#include "debug/FloatRegs.hh"
#include "debug/IntRegs.hh"
+#include "mem/page_table.hh"
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/eventq.hh"
+#include "sim/process.hh"
#include "sim/serialize.hh"
+#include "sim/system.hh"
class BaseCPU;
-
-#if FULL_SYSTEM
-
-#include "sim/system.hh"
+class CheckerCPU;
class FunctionProfile;
class ProfileNode;
namespace TheISA {
namespace Kernel {
class Statistics;
- };
-};
-
-#else // !FULL_SYSTEM
-
-#include "mem/page_table.hh"
-#include "sim/process.hh"
-
-#endif // FULL_SYSTEM
+ }
+}
/**
* The SimpleThread object provides a combination of the ThreadState
public:
std::string name() const
{
- return csprintf("%s.[tid:%i]", cpu->name(), tc->threadId());
+ return csprintf("%s.[tid:%i]", baseCpu->name(), tc->threadId());
}
- // pointer to CPU associated with this SimpleThread
- BaseCPU *cpu;
-
ProxyThreadContext<SimpleThread> *tc;
System *system;
TheISA::TLB *itb;
TheISA::TLB *dtb;
- Decoder decoder;
+ TheISA::Decoder decoder;
// constructor: initialize SimpleThread from given process structure
-#if FULL_SYSTEM
+ // FS
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
TheISA::TLB *_itb, TheISA::TLB *_dtb,
bool use_kernel_stats = true);
-#else
- SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
- TheISA::TLB *_itb, TheISA::TLB *_dtb);
-#endif
+ // SE
+ SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
+ Process *_process, TheISA::TLB *_itb, TheISA::TLB *_dtb);
SimpleThread();
dtb->demapPage(vaddr, asn);
}
-#if FULL_SYSTEM
void dumpFuncProfile();
Fault hwrei();
bool simPalCheck(int palFunc);
-#endif
-
/*******************************************
* ThreadContext interface functions.
******************************************/
- BaseCPU *getCpuPtr() { return cpu; }
+ BaseCPU *getCpuPtr() { return baseCpu; }
TheISA::TLB *getITBPtr() { return itb; }
TheISA::TLB *getDTBPtr() { return dtb; }
-#if USE_CHECKER
- BaseCPU *getCheckerCpuPtr() { return NULL; }
-#endif
+ CheckerCPU *getCheckerCpuPtr() { return NULL; }
- Decoder *getDecoderPtr() { return &decoder; }
+ TheISA::Decoder *getDecoderPtr() { return &decoder; }
System *getSystemPtr() { return system; }
-#if FULL_SYSTEM
- PortProxy* getPhysProxy() { return physProxy; }
-
- /** Return a virtual port. This port cannot be cached locally in an object.
- * After a CPU switch it may point to the wrong memory object which could
- * mean stale data.
- */
- FSTranslatingPortProxy* getVirtProxy() { return virtProxy; }
-#endif
-
Status status() const { return _status; }
void setStatus(Status newStatus) { _status = newStatus; }
_pcState = val;
}
-#if USE_CHECKER
void
pcStateNoRecord(const TheISA::PCState &val)
{
_pcState = val;
}
-#endif
Addr
instAddr()
void setStCondFailures(unsigned sc_failures)
{ storeCondFailures = sc_failures; }
-#if !FULL_SYSTEM
void syscall(int64_t callnum)
{
process->syscall(callnum, tc);
}
-#endif
};