Merge zizzer.eecs.umich.edu:/bk/newmem

[gem5.git] / src / cpu / static_inst.hh

diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 5928eea7677752a5edac6c0af597a582bd89b787..a58ac85d61b84b938e50240e57674a6187530b00 100644 (file)
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -35,6 +35,7 @@
 #include <string>
 
 #include "arch/isa_traits.hh"
+#include "arch/utility.hh"
 #include "sim/faults.hh"
 #include "base/bitfield.hh"
 #include "base/hashmap.hh"
@@ -379,6 +380,7 @@ class StaticInst : public StaticInstBase
     {
         panic("StaticInst::branchTarget() called on instruction "
               "that is not a PC-relative branch.");
+        M5_DUMMY_RETURN
     }
 
     /**
@@ -393,6 +395,7 @@ class StaticInst : public StaticInstBase
         panic("StaticInst::branchTarget() called on instruction "
               "that is not an indirect branch.");
     }
+        M5_DUMMY_RETURN
 
     /**
      * Return true if the instruction is a control transfer, and if so,
@@ -437,9 +440,6 @@ class StaticInst : public StaticInstBase
     //This is defined as inline below.
     static StaticInstPtr decode(ExtMachInst mach_inst);
 
-    /// Return opcode of machine instruction
-    uint32_t getOpcode() { return bits(machInst, 31, 26);}
-
     /// Return name of machine instruction
     std::string getName() { return mnemonic; }
 };
@@ -472,7 +472,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst>
 
     /// Construct directly from machine instruction.
     /// Calls StaticInst::decode().
-    StaticInstPtr(TheISA::ExtMachInst mach_inst)
+    explicit StaticInstPtr(TheISA::ExtMachInst mach_inst)
         : RefCountingPtr<StaticInst>(StaticInst::decode(mach_inst))
     {
     }