cpu: Delete authors lists from the cpu directory.

[gem5.git] / src / cpu / testers / traffic_gen / trace_gen.hh

diff --git a/src/cpu/testers/traffic_gen/trace_gen.hh b/src/cpu/testers/traffic_gen/trace_gen.hh
index cf4d4dd19d9c0f72dc99bb1ecddcc2760706ffa0..fe386d8263e03e7a5c0ccbd84be019e4c2ac6132 100644 (file)
--- a/src/cpu/testers/traffic_gen/trace_gen.hh
+++ b/src/cpu/testers/traffic_gen/trace_gen.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013, 2017 ARM Limited
+ * Copyright (c) 2012-2013, 2017-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -33,11 +33,6 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Thomas Grass
- *          Andreas Hansson
- *          Sascha Bischoff
- *          Neha Agarwal
  */
 
 /**
@@ -152,15 +147,15 @@ class TraceGen : public BaseGen
     /**
      * Create a trace generator.
      *
-     * @param _name Name to use for status and debug
-     * @param master_id MasterID set on each request
+     * @param obj SimObject owning this sequence generator
+     * @param master_id MasterID related to the memory requests
      * @param _duration duration of this state before transitioning
      * @param trace_file File to read the transactions from
      * @param addr_offset Positive offset to add to trace address
      */
-    TraceGen(const std::string& _name, MasterID master_id, Tick _duration,
+    TraceGen(SimObject &obj, MasterID master_id, Tick _duration,
              const std::string& trace_file, Addr addr_offset)
-        : BaseGen(_name, master_id, _duration),
+        : BaseGen(obj, master_id, _duration),
           trace(trace_file),
           tickOffset(0),
           addrOffset(addr_offset),