CPU: Tidy up endianness handling for mmapped "IPR"s.

[gem5.git] / src / cpu / thread_context.hh

diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 8963553d5e773adbbf997915c6e9cf8c2e5e4bbe..78ecdacf2d34ebffc888de44746911473211cd14 100644 (file)
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -31,10 +31,11 @@
 #ifndef __CPU_THREAD_CONTEXT_HH__
 #define __CPU_THREAD_CONTEXT_HH__
 
-#include "arch/regfile.hh"
+#include "arch/registers.hh"
 #include "arch/types.hh"
 #include "base/types.hh"
 #include "config/full_system.hh"
+#include "config/the_isa.hh"
 #include "mem/request.hh"
 #include "sim/byteswap.hh"
 #include "sim/faults.hh"
@@ -79,7 +80,6 @@ namespace TheISA {
 class ThreadContext
 {
   protected:
-    typedef TheISA::RegFile RegFile;
     typedef TheISA::MachInst MachInst;
     typedef TheISA::IntReg IntReg;
     typedef TheISA::FloatReg FloatReg;
@@ -187,24 +187,16 @@ class ThreadContext
     //
     virtual uint64_t readIntReg(int reg_idx) = 0;
 
-    virtual FloatReg readFloatReg(int reg_idx, int width) = 0;
-
     virtual FloatReg readFloatReg(int reg_idx) = 0;
 
-    virtual FloatRegBits readFloatRegBits(int reg_idx, int width) = 0;
-
     virtual FloatRegBits readFloatRegBits(int reg_idx) = 0;
 
     virtual void setIntReg(int reg_idx, uint64_t val) = 0;
 
-    virtual void setFloatReg(int reg_idx, FloatReg val, int width) = 0;
-
     virtual void setFloatReg(int reg_idx, FloatReg val) = 0;
 
     virtual void setFloatRegBits(int reg_idx, FloatRegBits val) = 0;
 
-    virtual void setFloatRegBits(int reg_idx, FloatRegBits val, int width) = 0;
-
     virtual uint64_t readPC() = 0;
 
     virtual void setPC(uint64_t val) = 0;
@@ -377,30 +369,18 @@ class ProxyThreadContext : public ThreadContext
     uint64_t readIntReg(int reg_idx)
     { return actualTC->readIntReg(reg_idx); }
 
-    FloatReg readFloatReg(int reg_idx, int width)
-    { return actualTC->readFloatReg(reg_idx, width); }
-
     FloatReg readFloatReg(int reg_idx)
     { return actualTC->readFloatReg(reg_idx); }
 
-    FloatRegBits readFloatRegBits(int reg_idx, int width)
-    { return actualTC->readFloatRegBits(reg_idx, width); }
-
     FloatRegBits readFloatRegBits(int reg_idx)
     { return actualTC->readFloatRegBits(reg_idx); }
 
     void setIntReg(int reg_idx, uint64_t val)
     { actualTC->setIntReg(reg_idx, val); }
 
-    void setFloatReg(int reg_idx, FloatReg val, int width)
-    { actualTC->setFloatReg(reg_idx, val, width); }
-
     void setFloatReg(int reg_idx, FloatReg val)
     { actualTC->setFloatReg(reg_idx, val); }
 
-    void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
-    { actualTC->setFloatRegBits(reg_idx, val, width); }
-
     void setFloatRegBits(int reg_idx, FloatRegBits val)
     { actualTC->setFloatRegBits(reg_idx, val); }