CPU: Tidy up endianness handling for mmapped "IPR"s.

[gem5.git] / src / cpu / thread_context.hh

diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 98d244994e106a5fc3aa95475dee707d670c0989..78ecdacf2d34ebffc888de44746911473211cd14 100644 (file)
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -31,10 +31,11 @@
 #ifndef __CPU_THREAD_CONTEXT_HH__
 #define __CPU_THREAD_CONTEXT_HH__
 
-#include "arch/regfile.hh"
+#include "arch/registers.hh"
 #include "arch/types.hh"
 #include "base/types.hh"
 #include "config/full_system.hh"
+#include "config/the_isa.hh"
 #include "mem/request.hh"
 #include "sim/byteswap.hh"
 #include "sim/faults.hh"