#ifndef __CPU_THREAD_CONTEXT_HH__
#define __CPU_THREAD_CONTEXT_HH__
-#include "arch/regfile.hh"
+#include "arch/registers.hh"
#include "arch/types.hh"
+#include "base/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "mem/request.hh"
+#include "sim/byteswap.hh"
#include "sim/faults.hh"
-#include "sim/host.hh"
#include "sim/serialize.hh"
-#include "sim/syscallreturn.hh"
-#include "sim/byteswap.hh"
// @todo: Figure out a more architecture independent way to obtain the ITB and
// DTB pointers.
namespace TheISA
{
- class DTB;
- class ITB;
+ class TLB;
}
class BaseCPU;
class EndQuiesceEvent;
class ThreadContext
{
protected:
- typedef TheISA::RegFile RegFile;
typedef TheISA::MachInst MachInst;
typedef TheISA::IntReg IntReg;
typedef TheISA::FloatReg FloatReg;
typedef TheISA::FloatRegBits FloatRegBits;
- typedef TheISA::MiscRegFile MiscRegFile;
typedef TheISA::MiscReg MiscReg;
public:
+
enum Status
{
- /// Initialized but not running yet. All CPUs start in
- /// this state, but most transition to Active on cycle 1.
- /// In MP or SMT systems, non-primary contexts will stay
- /// in this state until a thread is assigned to them.
- Unallocated,
-
/// Running. Instructions should be executed only when
/// the context is in this state.
Active,
virtual BaseCPU *getCpuPtr() = 0;
- virtual void setCpuId(int id) = 0;
+ virtual int cpuId() = 0;
- virtual int readCpuId() = 0;
+ virtual int threadId() = 0;
- virtual TheISA::ITB *getITBPtr() = 0;
+ virtual void setThreadId(int id) = 0;
- virtual TheISA::DTB *getDTBPtr() = 0;
+ virtual int contextId() = 0;
+
+ virtual void setContextId(int id) = 0;
+
+ virtual TheISA::TLB *getITBPtr() = 0;
+
+ virtual TheISA::TLB *getDTBPtr() = 0;
-#if FULL_SYSTEM
virtual System *getSystemPtr() = 0;
+#if FULL_SYSTEM
virtual TheISA::Kernel::Statistics *getKernelStats() = 0;
virtual FunctionalPort *getPhysPort() = 0;
- virtual VirtualPort *getVirtPort(ThreadContext *tc = NULL) = 0;
+ virtual VirtualPort *getVirtPort() = 0;
- virtual void delVirtPort(VirtualPort *vp) = 0;
-
- virtual void connectMemPorts() = 0;
+ virtual void connectMemPorts(ThreadContext *tc) = 0;
#else
virtual TranslatingPort *getMemPort() = 0;
/// Set the status to Suspended.
virtual void suspend(int delay = 0) = 0;
- /// Set the status to Unallocated.
- virtual void deallocate(int delay = 0) = 0;
-
/// Set the status to Halted.
virtual void halt(int delay = 0) = 0;
virtual void profileSample() = 0;
#endif
- virtual int getThreadNum() = 0;
-
// Also somewhat obnoxious. Really only used for the TLB fault.
// However, may be quite useful in SPARC.
virtual TheISA::MachInst getInst() = 0;
//
virtual uint64_t readIntReg(int reg_idx) = 0;
- virtual FloatReg readFloatReg(int reg_idx, int width) = 0;
-
virtual FloatReg readFloatReg(int reg_idx) = 0;
- virtual FloatRegBits readFloatRegBits(int reg_idx, int width) = 0;
-
virtual FloatRegBits readFloatRegBits(int reg_idx) = 0;
virtual void setIntReg(int reg_idx, uint64_t val) = 0;
- virtual void setFloatReg(int reg_idx, FloatReg val, int width) = 0;
-
virtual void setFloatReg(int reg_idx, FloatReg val) = 0;
virtual void setFloatRegBits(int reg_idx, FloatRegBits val) = 0;
- virtual void setFloatRegBits(int reg_idx, FloatRegBits val, int width) = 0;
-
virtual uint64_t readPC() = 0;
virtual void setPC(uint64_t val) = 0;
virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0;
- virtual uint64_t readRegOtherThread(int misc_reg, unsigned tid) { return 0; }
+ virtual int flattenIntIndex(int reg) = 0;
+ virtual int flattenFloatIndex(int reg) = 0;
- virtual void setRegOtherThread(int misc_reg, const MiscReg &val, unsigned tid) { };
+ virtual uint64_t
+ readRegOtherThread(int misc_reg, ThreadID tid)
+ {
+ return 0;
+ }
+
+ virtual void
+ setRegOtherThread(int misc_reg, const MiscReg &val, ThreadID tid)
+ {
+ }
// Also not necessarily the best location for these two. Hopefully will go
// away once we decide upon where st cond failures goes.
virtual bool misspeculating() = 0;
#if !FULL_SYSTEM
- virtual IntReg getSyscallArg(int i) = 0;
-
- // used to shift args for indirect syscall
- virtual void setSyscallArg(int i, IntReg val) = 0;
-
- virtual void setSyscallReturn(SyscallReturn return_value) = 0;
-
// Same with st cond failures.
virtual Counter readFuncExeInst() = 0;
virtual int exit() { return 1; };
#endif
- virtual void changeRegFileContext(TheISA::RegContextParam param,
- TheISA::RegContextVal val) = 0;
-
/** function to compare two thread contexts (for debugging) */
static void compare(ThreadContext *one, ThreadContext *two);
};
BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
- void setCpuId(int id) { actualTC->setCpuId(id); }
+ int cpuId() { return actualTC->cpuId(); }
- int readCpuId() { return actualTC->readCpuId(); }
+ int threadId() { return actualTC->threadId(); }
- TheISA::ITB *getITBPtr() { return actualTC->getITBPtr(); }
+ void setThreadId(int id) { return actualTC->setThreadId(id); }
- TheISA::DTB *getDTBPtr() { return actualTC->getDTBPtr(); }
+ int contextId() { return actualTC->contextId(); }
+
+ void setContextId(int id) { actualTC->setContextId(id); }
+
+ TheISA::TLB *getITBPtr() { return actualTC->getITBPtr(); }
+
+ TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
-#if FULL_SYSTEM
System *getSystemPtr() { return actualTC->getSystemPtr(); }
+#if FULL_SYSTEM
TheISA::Kernel::Statistics *getKernelStats()
{ return actualTC->getKernelStats(); }
FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
- VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return actualTC->getVirtPort(tc); }
-
- void delVirtPort(VirtualPort *vp) { return actualTC->delVirtPort(vp); }
+ VirtualPort *getVirtPort() { return actualTC->getVirtPort(); }
- void connectMemPorts() { actualTC->connectMemPorts(); }
+ void connectMemPorts(ThreadContext *tc) { actualTC->connectMemPorts(tc); }
#else
TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
/// Set the status to Suspended.
void suspend(int delay = 0) { actualTC->suspend(); }
- /// Set the status to Unallocated.
- void deallocate(int delay = 0) { actualTC->deallocate(); }
-
/// Set the status to Halted.
void halt(int delay = 0) { actualTC->halt(); }
void profileClear() { return actualTC->profileClear(); }
void profileSample() { return actualTC->profileSample(); }
#endif
-
- int getThreadNum() { return actualTC->getThreadNum(); }
-
// @todo: Do I need this?
MachInst getInst() { return actualTC->getInst(); }
uint64_t readIntReg(int reg_idx)
{ return actualTC->readIntReg(reg_idx); }
- FloatReg readFloatReg(int reg_idx, int width)
- { return actualTC->readFloatReg(reg_idx, width); }
-
FloatReg readFloatReg(int reg_idx)
{ return actualTC->readFloatReg(reg_idx); }
- FloatRegBits readFloatRegBits(int reg_idx, int width)
- { return actualTC->readFloatRegBits(reg_idx, width); }
-
FloatRegBits readFloatRegBits(int reg_idx)
{ return actualTC->readFloatRegBits(reg_idx); }
void setIntReg(int reg_idx, uint64_t val)
{ actualTC->setIntReg(reg_idx, val); }
- void setFloatReg(int reg_idx, FloatReg val, int width)
- { actualTC->setFloatReg(reg_idx, val, width); }
-
void setFloatReg(int reg_idx, FloatReg val)
{ actualTC->setFloatReg(reg_idx, val); }
- void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
- { actualTC->setFloatRegBits(reg_idx, val, width); }
-
void setFloatRegBits(int reg_idx, FloatRegBits val)
{ actualTC->setFloatRegBits(reg_idx, val); }
uint64_t readNextMicroPC() { return actualTC->readMicroPC(); }
- void setNextMicroPC(uint64_t val) { actualTC->setMicroPC(val); }
+ void setNextMicroPC(uint64_t val) { actualTC->setNextMicroPC(val); }
MiscReg readMiscRegNoEffect(int misc_reg)
{ return actualTC->readMiscRegNoEffect(misc_reg); }
void setMiscReg(int misc_reg, const MiscReg &val)
{ return actualTC->setMiscReg(misc_reg, val); }
+ int flattenIntIndex(int reg)
+ { return actualTC->flattenIntIndex(reg); }
+
+ int flattenFloatIndex(int reg)
+ { return actualTC->flattenFloatIndex(reg); }
+
unsigned readStCondFailures()
{ return actualTC->readStCondFailures(); }
bool misspeculating() { return actualTC->misspeculating(); }
#if !FULL_SYSTEM
- IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
-
- // used to shift args for indirect syscall
- void setSyscallArg(int i, IntReg val)
- { actualTC->setSyscallArg(i, val); }
-
- void setSyscallReturn(SyscallReturn return_value)
- { actualTC->setSyscallReturn(return_value); }
-
void syscall(int64_t callnum)
{ actualTC->syscall(callnum); }
Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
#endif
-
- void changeRegFileContext(TheISA::RegContextParam param,
- TheISA::RegContextVal val)
- {
- actualTC->changeRegFileContext(param, val);
- }
};
#endif