/*
- * Copyright (c) 2011-2012, 2016-2018 ARM Limited
+ * Copyright (c) 2011-2012, 2016-2018, 2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Kevin Lim
*/
#ifndef __CPU_THREAD_CONTEXT_HH__
#include <iostream>
#include <string>
+#include "arch/generic/htm.hh"
+#include "arch/generic/isa.hh"
#include "arch/registers.hh"
#include "arch/types.hh"
#include "base/types.hh"
// DTB pointers.
namespace TheISA
{
- class ISA;
class Decoder;
}
class BaseCPU;
class BaseTLB;
class CheckerCPU;
class Checkpoint;
-class EndQuiesceEvent;
class PortProxy;
class Process;
class System;
-namespace Kernel {
- class Statistics;
-}
/**
* ThreadContext is the external interface to all thread state for
class ThreadContext : public PCEventScope
{
protected:
- typedef TheISA::MachInst MachInst;
using VecRegContainer = TheISA::VecRegContainer;
using VecElem = TheISA::VecElem;
using VecPredRegContainer = TheISA::VecPredRegContainer;
virtual CheckerCPU *getCheckerCpuPtr() = 0;
- virtual TheISA::ISA *getIsaPtr() = 0;
+ virtual BaseISA *getIsaPtr() = 0;
virtual TheISA::Decoder *getDecoderPtr() = 0;
virtual System *getSystemPtr() = 0;
- virtual ::Kernel::Statistics *getKernelStats() = 0;
-
virtual PortProxy &getPhysProxy() = 0;
virtual PortProxy &getVirtProxy() = 0;
/// Quiesce, suspend, and schedule activate at resume
void quiesceTick(Tick resume);
- virtual void dumpFuncProfile() = 0;
-
virtual void takeOverFrom(ThreadContext *old_context) = 0;
- virtual void regStats(const std::string &name) = 0;
+ virtual void regStats(const std::string &name) {};
- virtual EndQuiesceEvent *getQuiesceEvent() = 0;
-
- virtual Tick nextInstEventCount() = 0;
- virtual void serviceInstCountEvents(Tick count) = 0;
virtual void scheduleInstCountEvent(Event *event, Tick count) = 0;
virtual void descheduleInstCountEvent(Event *event) = 0;
virtual Tick getCurrentInstCount() = 0;
virtual Tick readLastActivate() = 0;
virtual Tick readLastSuspend() = 0;
- virtual void profileClear() = 0;
- virtual void profileSample() = 0;
-
virtual void copyArchRegs(ThreadContext *tc) = 0;
virtual void clearArchRegs() = 0;
// Same with st cond failures.
virtual Counter readFuncExeInst() const = 0;
- virtual void syscall(int64_t callnum, Fault *fault) = 0;
-
// This function exits the thread context in the CPU and returns
// 1 if the CPU has no more active threads (meaning it's OK to exit);
// Used in syscall-emulation mode when a thread calls the exit syscall.
virtual void setCCRegFlat(RegIndex idx, RegVal val) = 0;
/** @} */
+ // hardware transactional memory
+ virtual void htmAbortTransaction(uint64_t htm_uid,
+ HtmFailureFaultCause cause) = 0;
+ virtual BaseHTMCheckpointPtr& getHtmCheckpointPtr() = 0;
+ virtual void setHtmCheckpointPtr(BaseHTMCheckpointPtr cpt) = 0;
};
/** @{ */