#include "arch/types.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
-#include "config/use_checker.hh"
// @todo: Figure out a more architecture independent way to obtain the ITB and
// DTB pointers.
namespace TheISA
{
+ class Decoder;
class TLB;
}
class BaseCPU;
+class CheckerCPU;
class Checkpoint;
-class Decoder;
class EndQuiesceEvent;
class SETranslatingPortProxy;
class FSTranslatingPortProxy;
namespace TheISA {
namespace Kernel {
class Statistics;
- };
-};
+ }
+}
/**
* ThreadContext is the external interface to all thread state for
virtual TheISA::TLB *getDTBPtr() = 0;
-#if USE_CHECKER
- virtual BaseCPU *getCheckerCpuPtr() = 0;
-#endif
+ virtual CheckerCPU *getCheckerCpuPtr() = 0;
- virtual Decoder *getDecoderPtr() = 0;
+ virtual TheISA::Decoder *getDecoderPtr() = 0;
virtual System *getSystemPtr() = 0;
virtual void pcState(const TheISA::PCState &val) = 0;
-#if USE_CHECKER
virtual void pcStateNoRecord(const TheISA::PCState &val) = 0;
-#endif
virtual Addr instAddr() = 0;
TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
-#if USE_CHECKER
- BaseCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
-#endif
+ CheckerCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
- Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
+ TheISA::Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
System *getSystemPtr() { return actualTC->getSystemPtr(); }
void pcState(const TheISA::PCState &val) { actualTC->pcState(val); }
-#if USE_CHECKER
void pcStateNoRecord(const TheISA::PCState &val) { actualTC->pcState(val); }
-#endif
Addr instAddr() { return actualTC->instAddr(); }
Addr nextInstAddr() { return actualTC->nextInstAddr(); }