InOrder: Clean up some DPRINTFs that print data sent to/from the cache.

[gem5.git] / src / cpu / thread_state.hh

diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 0a0af8b7183fc00531ec5faf850011c32fd24a3a..cf637aedafc941eb6cd8436d11f6afd1860a92b3 100644 (file)
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -32,8 +32,10 @@
 #define __CPU_THREAD_STATE_HH__
 
 #include "arch/types.hh"
+#include "config/the_isa.hh"
 #include "cpu/profile.hh"
 #include "cpu/thread_context.hh"
+#include "cpu/base.hh"
 
 #if !FULL_SYSTEM
 #include "mem/mem_object.hh"
@@ -51,7 +53,6 @@ namespace TheISA {
 };
 #endif
 
-class BaseCPU;
 class Checkpoint;
 class Port;
 class TranslatingPort;
@@ -66,10 +67,9 @@ struct ThreadState {
     typedef ThreadContext::Status Status;
 
 #if FULL_SYSTEM
-    ThreadState(BaseCPU *cpu, int _cpuId, int _tid);
+    ThreadState(BaseCPU *cpu, ThreadID _tid);
 #else
-    ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process,
-                short _asid);
+    ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
 #endif
 
     ~ThreadState();
@@ -78,19 +78,27 @@ struct ThreadState {
 
     void unserialize(Checkpoint *cp, const std::string &section);
 
-    void setCpuId(int id) { cpuId = id; }
+    int cpuId() { return baseCpu->cpuId(); }
 
-    int readCpuId() { return cpuId; }
+    int contextId() { return _contextId; }
 
-    void setTid(int id) { tid = id; }
+    void setContextId(int id) { _contextId = id; }
 
-    int readTid() { return tid; }
+    void setThreadId(ThreadID id) { _threadId = id; }
+
+    ThreadID threadId() { return _threadId; }
 
     Tick readLastActivate() { return lastActivate; }
 
     Tick readLastSuspend() { return lastSuspend; }
 
 #if FULL_SYSTEM
+    void connectMemPorts(ThreadContext *tc);
+
+    void connectPhysPort();
+
+    void connectVirtPort(ThreadContext *tc);
+
     void dumpFuncProfile();
 
     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
@@ -105,18 +113,13 @@ struct ThreadState {
 
     void setPhysPort(FunctionalPort *port) { physPort = port; }
 
-    VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; }
-
-    void setVirtPort(VirtualPort *port) { virtPort = port; }
+    VirtualPort *getVirtPort() { return virtPort; }
 #else
     Process *getProcessPtr() { return process; }
 
     TranslatingPort *getMemPort();
 
     void setMemPort(TranslatingPort *_port) { port = _port; }
-
-    int getInstAsid() { return asid; }
-    int getDataAsid() { return asid; }
 #endif
 
     /** Sets the current instruction being committed. */
@@ -141,18 +144,17 @@ struct ThreadState {
     /** Sets the status of this thread. */
     void setStatus(Status new_status) { _status = new_status; }
 
-  protected:
-    /** Gets a functional port from the memory object that's connected
-     * to the CPU. */
-    Port *getMemFuncPort();
-
   public:
+    /** Connects port to the functional port of the memory object
+     * below the CPU. */
+    void connectToMemFunc(Port *port);
+
     /** Number of instructions committed. */
     Counter numInst;
     /** Stat for number instructions committed. */
-    Stats::Scalar<> numInsts;
+    Stats::Scalar numInsts;
     /** Stat for number of memory references. */
-    Stats::Scalar<> numMemRefs;
+    Stats::Scalar numMemRefs;
 
     /** Number of simulated loads, used for tracking events based on
      * the number of loads committed.
@@ -168,12 +170,11 @@ struct ThreadState {
     // Pointer to the base CPU.
     BaseCPU *baseCpu;
 
-    // ID of this context w.r.t. the System or Process object to which
-    // it belongs.  For full-system mode, this is the system CPU ID.
-    int cpuId;
+    // system wide HW context id
+    int _contextId;
 
     // Index of hardware thread context on the CPU that this represents.
-    int tid;
+    ThreadID _threadId;
 
   public:
     /** Last time activate was called on this thread. */
@@ -196,18 +197,12 @@ struct ThreadState {
     FunctionalPort *physPort;
 
     /** A functional port, outgoing only, for functional accesse to virtual
-     * addresses. That doen't require execution context information */
+     * addresses. */
     VirtualPort *virtPort;
 #else
     TranslatingPort *port;
 
     Process *process;
-
-    // Address space ID.  Note that this is used for TIMING cache
-    // simulation only; all functional memory accesses should use
-    // one of the FunctionalMemory pointers above.
-    short asid;
-
 #endif
 
     /** Current instruction the thread is committing.  Only set and
@@ -215,16 +210,6 @@ struct ThreadState {
      */
     TheISA::MachInst inst;
 
-    /** The current microcode pc for the currently executing macro
-     * operation.
-     */
-    MicroPC microPC;
-
-    /** The next microcode pc for the currently executing macro
-     * operation.
-     */
-    MicroPC nextMicroPC;
-
   public:
     /**
      * Temporary storage to pass the source address from copy_load to