#define __CPU_THREAD_STATE_HH__
#include "arch/types.hh"
+#include "config/the_isa.hh"
+#include "cpu/base.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
-
-#if !FULL_SYSTEM
#include "mem/mem_object.hh"
#include "sim/process.hh"
-#endif
-#if FULL_SYSTEM
class EndQuiesceEvent;
class FunctionProfile;
class ProfileNode;
namespace TheISA {
namespace Kernel {
class Statistics;
- };
-};
-#endif
+ }
+}
-class BaseCPU;
class Checkpoint;
-class Port;
-class TranslatingPort;
/**
* Struct for holding general thread state that is needed across CPU
struct ThreadState {
typedef ThreadContext::Status Status;
-#if FULL_SYSTEM
- ThreadState(BaseCPU *cpu, int _cpuId, int _tid);
-#else
- ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process,
- short _asid);
-#endif
+ ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
- ~ThreadState();
+ virtual ~ThreadState();
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string §ion);
- void setCpuId(int id) { cpuId = id; }
+ int cpuId() const { return baseCpu->cpuId(); }
- int readCpuId() { return cpuId; }
+ uint32_t socketId() const { return baseCpu->socketId(); }
- void setTid(int id) { tid = id; }
+ int contextId() const { return _contextId; }
- int readTid() { return tid; }
+ void setContextId(int id) { _contextId = id; }
- Tick readLastActivate() { return lastActivate; }
+ void setThreadId(ThreadID id) { _threadId = id; }
- Tick readLastSuspend() { return lastSuspend; }
+ ThreadID threadId() const { return _threadId; }
-#if FULL_SYSTEM
- void connectMemPorts(ThreadContext *tc);
+ Tick readLastActivate() const { return lastActivate; }
- void connectPhysPort();
+ Tick readLastSuspend() const { return lastSuspend; }
- void connectVirtPort(ThreadContext *tc);
+ /**
+ * Initialise the physical and virtual port proxies and tie them to
+ * the data port of the CPU.
+ *
+ * @param tc ThreadContext for the virtual-to-physical translation
+ */
+ void initMemProxies(ThreadContext *tc);
void dumpFuncProfile();
TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
- FunctionalPort *getPhysPort() { return physPort; }
+ PortProxy &getPhysProxy();
- void setPhysPort(FunctionalPort *port) { physPort = port; }
+ FSTranslatingPortProxy &getVirtProxy();
- VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; }
-
- void setVirtPort(VirtualPort *port) { virtPort = port; }
-#else
Process *getProcessPtr() { return process; }
- TranslatingPort *getMemPort();
-
- void setMemPort(TranslatingPort *_port) { port = _port; }
-
- int getInstAsid() { return asid; }
- int getDataAsid() { return asid; }
-#endif
-
- /** Sets the current instruction being committed. */
- void setInst(TheISA::MachInst _inst) { inst = _inst; }
-
- /** Returns the current instruction being committed. */
- TheISA::MachInst getInst() { return inst; }
+ SETranslatingPortProxy &getMemProxy();
/** Reads the number of instructions functionally executed and
* committed.
void setStatus(Status new_status) { _status = new_status; }
public:
- /** Connects port to the functional port of the memory object
- * below the CPU. */
- void connectToMemFunc(Port *port);
/** Number of instructions committed. */
Counter numInst;
/** Stat for number instructions committed. */
- Stats::Scalar<> numInsts;
+ Stats::Scalar numInsts;
+ /** Number of ops (including micro ops) committed. */
+ Counter numOp;
+ /** Stat for number ops (including micro ops) committed. */
+ Stats::Scalar numOps;
/** Stat for number of memory references. */
- Stats::Scalar<> numMemRefs;
+ Stats::Scalar numMemRefs;
/** Number of simulated loads, used for tracking events based on
* the number of loads committed.
// Pointer to the base CPU.
BaseCPU *baseCpu;
- // ID of this context w.r.t. the System or Process object to which
- // it belongs. For full-system mode, this is the system CPU ID.
- int cpuId;
+ // system wide HW context id
+ int _contextId;
// Index of hardware thread context on the CPU that this represents.
- int tid;
+ ThreadID _threadId;
public:
/** Last time activate was called on this thread. */
/** Last time suspend was called on this thread. */
Tick lastSuspend;
-#if FULL_SYSTEM
public:
FunctionProfile *profile;
ProfileNode *profileNode;
EndQuiesceEvent *quiesceEvent;
TheISA::Kernel::Statistics *kernelStats;
- protected:
- /** A functional port outgoing only for functional accesses to physical
- * addresses.*/
- FunctionalPort *physPort;
-
- /** A functional port, outgoing only, for functional accesse to virtual
- * addresses. */
- VirtualPort *virtPort;
-#else
- TranslatingPort *port;
+ protected:
Process *process;
- // Address space ID. Note that this is used for TIMING cache
- // simulation only; all functional memory accesses should use
- // one of the FunctionalMemory pointers above.
- short asid;
-
-#endif
-
- /** Current instruction the thread is committing. Only set and
- * used for DTB faults currently.
- */
- TheISA::MachInst inst;
-
- /** The current microcode pc for the currently executing macro
- * operation.
- */
- MicroPC microPC;
+ /** A port proxy outgoing only for functional accesses to physical
+ * addresses.*/
+ PortProxy *physProxy;
- /** The next microcode pc for the currently executing macro
- * operation.
- */
- MicroPC nextMicroPC;
+ /** A translating port proxy, outgoing only, for functional
+ * accesse to virtual addresses. */
+ FSTranslatingPortProxy *virtProxy;
+ SETranslatingPortProxy *proxy;
public:
- /**
- * Temporary storage to pass the source address from copy_load to
- * copy_store.
- * @todo Remove this temporary when we have a better way to do it.
- */
- Addr copySrcAddr;
- /**
- * Temp storage for the physical source address of a copy.
- * @todo Remove this temporary when we have a better way to do it.
- */
- Addr copySrcPhysAddr;
-
/*
* number of executed instructions, for matching with syscall trace
* points in EIO files.
projects / gem5.git / blobdiff