X86: Extend mov2int and mov2fp so they can support insert and extract instructions.

[gem5.git] / src / dev / Pci.py

diff --git a/src/dev/Pci.py b/src/dev/Pci.py
index b2c013f41ca0276f2a6c68ea5124f0030aeb85f2..bd67d82fb0edf3933748ac29decd92d9345cb6d0 100644 (file)
--- a/src/dev/Pci.py
+++ b/src/dev/Pci.py
@@ -31,8 +31,23 @@ from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice, DmaDevice, PioDevice
 
-class PciConfigData(SimObject):
-    type = 'PciConfigData'
+class PciConfigAll(PioDevice):
+    type = 'PciConfigAll'
+    pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
+    bus = Param.UInt8(0x00, "PCI bus to act as config space for")
+    size = Param.MemorySize32('16MB', "Size of config space")
+
+
+class PciDevice(DmaDevice):
+    type = 'PciDevice'
+    abstract = True
+    config = Port(Self.pio.peerObj.port, "PCI configuration space port")
+    pci_bus = Param.Int("PCI bus")
+    pci_dev = Param.Int("PCI device number")
+    pci_func = Param.Int("PCI function code")
+    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+    config_latency = Param.Latency('20ns', "Config read or write latency")
+
     VendorID = Param.UInt16("Vendor ID")
     DeviceID = Param.UInt16("Device ID")
     Command = Param.UInt16(0, "Command")
@@ -58,6 +73,12 @@ class PciConfigData(SimObject):
     BAR3Size = Param.MemorySize32('0B', "Base Address Register 3 Size")
     BAR4Size = Param.MemorySize32('0B', "Base Address Register 4 Size")
     BAR5Size = Param.MemorySize32('0B', "Base Address Register 5 Size")
+    BAR0LegacyIO = Param.Bool(False, "Whether BAR0 is hardwired legacy IO")
+    BAR1LegacyIO = Param.Bool(False, "Whether BAR1 is hardwired legacy IO")
+    BAR2LegacyIO = Param.Bool(False, "Whether BAR2 is hardwired legacy IO")
+    BAR3LegacyIO = Param.Bool(False, "Whether BAR3 is hardwired legacy IO")
+    BAR4LegacyIO = Param.Bool(False, "Whether BAR4 is hardwired legacy IO")
+    BAR5LegacyIO = Param.Bool(False, "Whether BAR5 is hardwired legacy IO")
 
     CardbusCIS = Param.UInt32(0x00, "Cardbus Card Information Structure")
     SubsystemID = Param.UInt16(0x00, "Subsystem ID")
@@ -68,20 +89,4 @@ class PciConfigData(SimObject):
     MaximumLatency = Param.UInt8(0x00, "Maximum Latency")
     MinimumGrant = Param.UInt8(0x00, "Minimum Grant")
 
-class PciConfigAll(PioDevice):
-    type = 'PciConfigAll'
-    pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
-    bus = Param.UInt8(0x00, "PCI bus to act as config space for")
-    size = Param.MemorySize32('16MB', "Size of config space")
-
 
-class PciDevice(DmaDevice):
-    type = 'PciDevice'
-    abstract = True
-    config = Port(Self.pio.peerObj.port, "PCI configuration space port")
-    pci_bus = Param.Int("PCI bus")
-    pci_dev = Param.Int("PCI device number")
-    pci_func = Param.Int("PCI function code")
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
-    configdata = Param.PciConfigData(Parent.any, "PCI Config data")
-    config_latency = Param.Latency('20ns', "Config read or write latency")