kern,sim: implement FUTEX_WAKE_OP

[gem5.git] / src / dev / SConscript

diff --git a/src/dev/SConscript b/src/dev/SConscript
index bd6b16c43a81a68f7757087228e62a61b9236c44..ecb6dccbbe46fd0c694302311cef654cbdd8a696 100644 (file)
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -31,74 +31,26 @@
 
 Import('*')
 
-if env['FULL_SYSTEM']:
-    SimObject('BadDevice.py')
-    SimObject('Device.py')
-    SimObject('DiskImage.py')
-    SimObject('Ethernet.py')
-    SimObject('Ide.py')
-    SimObject('Pci.py')
-    SimObject('Platform.py')
-    SimObject('SimConsole.py')
-    SimObject('SimpleDisk.py')
-    SimObject('Uart.py')
+SimObject('Device.py')
+Source('io_device.cc')
+Source('isa_fake.cc')
+Source('dma_device.cc')
 
-    Source('baddev.cc')
-    Source('disk_image.cc')
-    Source('etherbus.cc')
-    Source('etherdump.cc')
-    Source('etherint.cc')
-    Source('etherlink.cc')
-    Source('etherpkt.cc')
-    Source('ethertap.cc')
-    Source('i8254xGBe.cc')
-    Source('ide_ctrl.cc')
-    Source('ide_disk.cc')
-    Source('intel_8254_timer.cc')
-    Source('io_device.cc')
-    Source('isa_fake.cc')
-    Source('mc146818.cc')
-    Source('ns_gige.cc')
-    Source('pciconfigall.cc')
-    Source('pcidev.cc')
-    Source('pktfifo.cc')
-    Source('platform.cc')
-    Source('simconsole.cc')
-    Source('simple_disk.cc')
-    Source('sinic.cc')
-    Source('uart.cc')
-    Source('uart8250.cc')
+DebugFlag('IsaFake')
+DebugFlag('DMA')
 
-    TraceFlag('Console')
-    TraceFlag('ConsoleVerbose')
-    TraceFlag('DiskImageRead')
-    TraceFlag('DiskImageWrite')
-    TraceFlag('DMA')
-    TraceFlag('Ethernet')
-    TraceFlag('EthernetCksum')
-    TraceFlag('EthernetDMA')
-    TraceFlag('EthernetData')
-    TraceFlag('EthernetDesc')
-    TraceFlag('EthernetEEPROM')
-    TraceFlag('EthernetIntr')
-    TraceFlag('EthernetPIO')
-    TraceFlag('EthernetSM')
-    TraceFlag('IdeCtrl')
-    TraceFlag('IdeDisk')
-    TraceFlag('Intel8254Timer')
-    TraceFlag('IsaFake')
-    TraceFlag('MC146818')
-    TraceFlag('PCIDEV')
-    TraceFlag('PciConfigAll')
-    TraceFlag('SimpleDisk')
-    TraceFlag('SimpleDiskData')
-    TraceFlag('Uart')
+SimObject('Platform.py')
+Source('platform.cc')
 
-    CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
-    CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
-        'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
-        'EthernetCksum' ])
-    CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
-        'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
-    CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
+if env['TARGET_ISA'] == 'null':
+    Return()
 
+SimObject('BadDevice.py')
+
+Source('baddev.cc')
+Source('intel_8254_timer.cc')
+Source('mc146818.cc')
+Source('pixelpump.cc')
+
+DebugFlag('Intel8254Timer')
+DebugFlag('MC146818')