gcc: Add extra parens to quell warnings.

[gem5.git] / src / dev / alpha / tsunami_cchip.cc

diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 924e1d4622152f145fc60aa4a749d56bc2352a93..4477b5adcac1e147c0ce722a70dba9ab6e50d55e 100644 (file)
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -47,17 +47,17 @@
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "mem/port.hh"
-#include "sim/builder.hh"
+#include "params/TsunamiCChip.hh"
 #include "sim/system.hh"
 
 using namespace std;
 //Should this be AlphaISA?
 using namespace TheISA;
 
-TsunamiCChip::TsunamiCChip(Params *p)
+TsunamiCChip::TsunamiCChip(const Params *p)
     : BasicPioDevice(p), tsunami(p->tsunami)
 {
-    pioSize = 0xfffffff;
+    pioSize = 0x10000000;
 
     drir = 0;
     ipint = 0;
@@ -78,7 +78,6 @@ TsunamiCChip::read(PacketPtr pkt)
 {
     DPRINTF(Tsunami, "read  va=%#x size=%d\n", pkt->getAddr(), pkt->getSize());
 
-    assert(pkt->result == Packet::Unknown);
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
     Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
@@ -88,6 +87,8 @@ TsunamiCChip::read(PacketPtr pkt)
     switch (pkt->getSize()) {
 
       case sizeof(uint64_t):
+          pkt->set<uint64_t>(0);
+
           if (daddr & TSDEV_CC_BDIMS)
           {
               pkt->set(dim[(daddr >> 4) & 0x3F]);
@@ -108,7 +109,7 @@ TsunamiCChip::read(PacketPtr pkt)
                   panic("TSDEV_CC_MTR not implemeted\n");
                    break;
               case TSDEV_CC_MISC:
-                  pkt->set((ipint << 8) & 0xF | (itint << 4) & 0xF |
+                  pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
                                      (pkt->req->getCpuNum() & 0x3));
                   break;
               case TSDEV_CC_AAR0:
@@ -179,7 +180,7 @@ TsunamiCChip::read(PacketPtr pkt)
     DPRINTF(Tsunami, "Tsunami CChip: read  regnum=%#x size=%d data=%lld\n",
             regnum, pkt->getSize(), pkt->get<uint64_t>());
 
-    pkt->result = Packet::Success;
+    pkt->makeAtomicResponse();
     return pioDelay;
 }
 
@@ -363,14 +364,14 @@ TsunamiCChip::write(PacketPtr pkt)
               panic("default in cchip read reached, accessing 0x%x\n");
         }  // swtich(regnum)
     } // not BIG_TSUNAMI write
-    pkt->result = Packet::Success;
+    pkt->makeAtomicResponse();
     return pioDelay;
 }
 
 void
 TsunamiCChip::clearIPI(uint64_t ipintr)
 {
-    int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
+    int numcpus = sys->threadContexts.size();
     assert(numcpus <= Tsunami::Max_CPUs);
 
     if (ipintr) {
@@ -396,7 +397,7 @@ TsunamiCChip::clearIPI(uint64_t ipintr)
 void
 TsunamiCChip::clearITI(uint64_t itintr)
 {
-    int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
+    int numcpus = sys->threadContexts.size();
     assert(numcpus <= Tsunami::Max_CPUs);
 
     if (itintr) {
@@ -416,7 +417,7 @@ TsunamiCChip::clearITI(uint64_t itintr)
 void
 TsunamiCChip::reqIPI(uint64_t ipreq)
 {
-    int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
+    int numcpus = sys->threadContexts.size();
     assert(numcpus <= Tsunami::Max_CPUs);
 
     if (ipreq) {
@@ -443,7 +444,7 @@ TsunamiCChip::reqIPI(uint64_t ipreq)
 void
 TsunamiCChip::postRTC()
 {
-    int size = tsunami->intrctrl->cpu->system->threadContexts.size();
+    int size = sys->threadContexts.size();
     assert(size <= Tsunami::Max_CPUs);
 
     for (int i = 0; i < size; i++) {
@@ -451,7 +452,7 @@ TsunamiCChip::postRTC()
        if (!(cpumask & itint)) {
            itint |= cpumask;
            tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ2, 0);
-           DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d", i);
+           DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d\n", i);
        }
     }
 
@@ -461,7 +462,7 @@ void
 TsunamiCChip::postDRIR(uint32_t interrupt)
 {
     uint64_t bitvector = ULL(1) << interrupt;
-    uint64_t size = tsunami->intrctrl->cpu->system->threadContexts.size();
+    uint64_t size = sys->threadContexts.size();
     assert(size <= Tsunami::Max_CPUs);
     drir |= bitvector;
 
@@ -479,7 +480,7 @@ void
 TsunamiCChip::clearDRIR(uint32_t interrupt)
 {
     uint64_t bitvector = ULL(1) << interrupt;
-    uint64_t size = tsunami->intrctrl->cpu->system->threadContexts.size();
+    uint64_t size = sys->threadContexts.size();
     assert(size <= Tsunami::Max_CPUs);
 
     if (drir & bitvector)
@@ -520,36 +521,8 @@ TsunamiCChip::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(drir);
 }
 
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
-
-    Param<Addr> pio_addr;
-    Param<Tick> pio_latency;
-    SimObjectParam<Platform *> platform;
-    SimObjectParam<System *> system;
-    SimObjectParam<Tsunami *> tsunami;
-
-END_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
-
-    INIT_PARAM(pio_addr, "Device Address"),
-    INIT_PARAM(pio_latency, "Programmed IO latency"),
-    INIT_PARAM(platform, "platform"),
-    INIT_PARAM(system, "system object"),
-    INIT_PARAM(tsunami, "Tsunami")
-
-END_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
-
-CREATE_SIM_OBJECT(TsunamiCChip)
+TsunamiCChip *
+TsunamiCChipParams::create()
 {
-    TsunamiCChip::Params *p = new TsunamiCChip::Params;
-    p->name = getInstanceName();
-    p->pio_addr = pio_addr;
-    p->pio_delay = pio_latency;
-    p->platform = platform;
-    p->system = system;
-    p->tsunami = tsunami;
-    return new TsunamiCChip(p);
+    return new TsunamiCChip(this);
 }
-
-REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)