#include "base/time.hh"
#include "base/trace.hh"
-#include "dev/pitreg.h"
-#include "dev/rtcreg.h"
-#include "dev/alpha/tsunami_cchip.hh"
+#include "config/the_isa.hh"
+#include "debug/Tsunami.hh"
#include "dev/alpha/tsunami.hh"
+#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami_io.hh"
#include "dev/alpha/tsunamireg.h"
+#include "dev/rtcreg.h"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/port.hh"
//Should this be AlphaISA?
using namespace TheISA;
-TsunamiIO::TsunamiRTC::TsunamiRTC(const string &n, const TsunamiIOParams *p) :
- MC146818(n, p->time, p->year_is_bcd, p->frequency), tsunami(p->tsunami)
-{
-}
-
-TsunamiIO::PITimer::PITimer(const string &name)
- : _name(name), counter0(name + ".counter0"), counter1(name + ".counter1"),
- counter2(name + ".counter2")
-{
- counter[0] = &counter0;
- counter[1] = &counter0;
- counter[2] = &counter0;
-}
-
-void
-TsunamiIO::PITimer::writeControl(const uint8_t data)
-{
- int rw;
- int sel;
-
- sel = GET_CTRL_SEL(data);
-
- if (sel == PIT_READ_BACK)
- panic("PITimer Read-Back Command is not implemented.\n");
-
- rw = GET_CTRL_RW(data);
-
- if (rw == PIT_RW_LATCH_COMMAND)
- counter[sel]->latchCount();
- else {
- counter[sel]->setRW(rw);
- counter[sel]->setMode(GET_CTRL_MODE(data));
- counter[sel]->setBCD(GET_CTRL_BCD(data));
- }
-}
-
-void
-TsunamiIO::PITimer::serialize(const string &base, ostream &os)
-{
- // serialize the counters
- counter0.serialize(base + ".counter0", os);
- counter1.serialize(base + ".counter1", os);
- counter2.serialize(base + ".counter2", os);
-}
-
-void
-TsunamiIO::PITimer::unserialize(const string &base, Checkpoint *cp,
- const string §ion)
-{
- // unserialze the counters
- counter0.unserialize(base + ".counter0", cp, section);
- counter1.unserialize(base + ".counter1", cp, section);
- counter2.unserialize(base + ".counter2", cp, section);
-}
-
-TsunamiIO::PITimer::Counter::Counter(const string &name)
- : _name(name), event(this), count(0), latched_count(0), period(0),
- mode(0), output_high(false), latch_on(false), read_byte(LSB),
- write_byte(LSB)
-{
-
-}
-
-void
-TsunamiIO::PITimer::Counter::latchCount()
-{
- // behave like a real latch
- if(!latch_on) {
- latch_on = true;
- read_byte = LSB;
- latched_count = count;
- }
-}
-
-uint8_t
-TsunamiIO::PITimer::Counter::read()
-{
- if (latch_on) {
- switch (read_byte) {
- case LSB:
- read_byte = MSB;
- return (uint8_t)latched_count;
- break;
- case MSB:
- read_byte = LSB;
- latch_on = false;
- return latched_count >> 8;
- break;
- default:
- panic("Shouldn't be here");
- }
- } else {
- switch (read_byte) {
- case LSB:
- read_byte = MSB;
- return (uint8_t)count;
- break;
- case MSB:
- read_byte = LSB;
- return count >> 8;
- break;
- default:
- panic("Shouldn't be here");
- }
- }
-}
-
-void
-TsunamiIO::PITimer::Counter::write(const uint8_t data)
-{
- switch (write_byte) {
- case LSB:
- count = (count & 0xFF00) | data;
-
- if (event.scheduled())
- event.deschedule();
- output_high = false;
- write_byte = MSB;
- break;
-
- case MSB:
- count = (count & 0x00FF) | (data << 8);
- period = count;
-
- if (period > 0) {
- DPRINTF(Tsunami, "Timer set to curTick + %d\n",
- count * event.interval);
- event.schedule(curTick + count * event.interval);
- }
- write_byte = LSB;
- break;
- }
-}
-
-void
-TsunamiIO::PITimer::Counter::setRW(int rw_val)
-{
- if (rw_val != PIT_RW_16BIT)
- panic("Only LSB/MSB read/write is implemented.\n");
-}
-
-void
-TsunamiIO::PITimer::Counter::setMode(int mode_val)
-{
- if(mode_val != PIT_MODE_INTTC && mode_val != PIT_MODE_RATEGEN &&
- mode_val != PIT_MODE_SQWAVE)
- panic("PIT mode %#x is not implemented: \n", mode_val);
-
- mode = mode_val;
-}
-
-void
-TsunamiIO::PITimer::Counter::setBCD(int bcd_val)
-{
- if (bcd_val != PIT_BCD_FALSE)
- panic("PITimer does not implement BCD counts.\n");
-}
-
-bool
-TsunamiIO::PITimer::Counter::outputHigh()
-{
- return output_high;
-}
-
-void
-TsunamiIO::PITimer::Counter::serialize(const string &base, ostream &os)
-{
- paramOut(os, base + ".count", count);
- paramOut(os, base + ".latched_count", latched_count);
- paramOut(os, base + ".period", period);
- paramOut(os, base + ".mode", mode);
- paramOut(os, base + ".output_high", output_high);
- paramOut(os, base + ".latch_on", latch_on);
- paramOut(os, base + ".read_byte", read_byte);
- paramOut(os, base + ".write_byte", write_byte);
-
- Tick event_tick = 0;
- if (event.scheduled())
- event_tick = event.when();
- paramOut(os, base + ".event_tick", event_tick);
-}
-
-void
-TsunamiIO::PITimer::Counter::unserialize(const string &base, Checkpoint *cp,
- const string §ion)
-{
- paramIn(cp, section, base + ".count", count);
- paramIn(cp, section, base + ".latched_count", latched_count);
- paramIn(cp, section, base + ".period", period);
- paramIn(cp, section, base + ".mode", mode);
- paramIn(cp, section, base + ".output_high", output_high);
- paramIn(cp, section, base + ".latch_on", latch_on);
- paramIn(cp, section, base + ".read_byte", read_byte);
- paramIn(cp, section, base + ".write_byte", write_byte);
-
- Tick event_tick;
- paramIn(cp, section, base + ".event_tick", event_tick);
- if (event_tick)
- event.schedule(event_tick);
-}
-
-TsunamiIO::PITimer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
- : Event(&mainEventQueue)
-{
- interval = (Tick)(Clock::Float::s / 1193180.0);
- counter = c_ptr;
-}
-
-void
-TsunamiIO::PITimer::Counter::CounterEvent::process()
-{
- DPRINTF(Tsunami, "Timer Interrupt\n");
- switch (counter->mode) {
- case PIT_MODE_INTTC:
- counter->output_high = true;
- case PIT_MODE_RATEGEN:
- case PIT_MODE_SQWAVE:
- break;
- default:
- panic("Unimplemented PITimer mode.\n");
- }
-}
-
-const char *
-TsunamiIO::PITimer::Counter::CounterEvent::description() const
+TsunamiIO::RTC::RTC(const string &n, const TsunamiIOParams *p)
+ : MC146818(p->tsunami, n, p->time, p->year_is_bcd, p->frequency),
+ tsunami(p->tsunami)
{
- return "tsunami 8254 Interval timer";
}
TsunamiIO::TsunamiIO(const Params *p)
- : BasicPioDevice(p), tsunami(p->tsunami), pitimer(p->name + "pitimer"),
- rtc(p->name + ".rtc", p)
+ : BasicPioDevice(p), tsunami(p->tsunami),
+ pitimer(this, p->name + "pitimer"), rtc(p->name + ".rtc", p)
{
pioSize = 0x100;
Tick
TsunamiIO::frequency() const
{
- return Clock::Frequency / params()->frequency;
+ return SimClock::Frequency / params()->frequency;
}
Tick
pkt->set(0x00);
break;
case TSDEV_TMR0_DATA:
- pkt->set(pitimer.counter0.read());
+ pkt->set(pitimer.readCounter(0));
break;
case TSDEV_TMR1_DATA:
- pkt->set(pitimer.counter1.read());
+ pkt->set(pitimer.readCounter(1));
break;
case TSDEV_TMR2_DATA:
- pkt->set(pitimer.counter2.read());
+ pkt->set(pitimer.readCounter(2));
break;
case TSDEV_RTC_DATA:
pkt->set(rtc.readData(rtcAddr));
break;
case TSDEV_CTRL_PORTB:
- if (pitimer.counter2.outputHigh())
+ if (pitimer.outputHigh(2))
pkt->set(PORTB_SPKR_HIGH);
else
pkt->set(0x00);
mode2 = pkt->get<uint8_t>();
break;
case TSDEV_TMR0_DATA:
- pitimer.counter0.write(pkt->get<uint8_t>());
+ pitimer.writeCounter(0, pkt->get<uint8_t>());
break;
case TSDEV_TMR1_DATA:
- pitimer.counter1.write(pkt->get<uint8_t>());
+ pitimer.writeCounter(1, pkt->get<uint8_t>());
break;
case TSDEV_TMR2_DATA:
- pitimer.counter2.write(pkt->get<uint8_t>());
+ pitimer.writeCounter(2, pkt->get<uint8_t>());
break;
case TSDEV_TMR_CTRL:
pitimer.writeControl(pkt->get<uint8_t>());
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