/*
- * Copyright (c) 2012-2013, 2015, 2017 ARM Limited
+ * Copyright (c) 2012-2013, 2015, 2017, 2019 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Ali Saidi
- * Nathan Binkert
- * Andreas Sandberg
*/
#ifndef __DEV_DMA_DEVICE_HH__
class ClockedObject;
-class DmaPort : public MasterPort, public Drainable
+class DmaPort : public RequestPort, public Drainable
{
private:
* send whatever it is that it's sending. */
bool inRetry;
+ /** Default streamId */
+ const uint32_t defaultSid;
+
+ /** Default substreamId */
+ const uint32_t defaultSSid;
+
protected:
bool recvTimingResp(PacketPtr pkt) override;
public:
- DmaPort(ClockedObject *dev, System *s);
+ DmaPort(ClockedObject *dev, System *s,
+ uint32_t sid = 0, uint32_t ssid = 0);
- RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
- uint8_t *data, Tick delay, Request::Flags flag = 0);
+ RequestPtr
+ dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
+ uint8_t *data, Tick delay, Request::Flags flag = 0);
+
+ RequestPtr
+ dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
+ uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
+ Request::Flags flag = 0);
bool dmaPending() const { return pendingCount > 0; }
DmaDevice(const Params *p);
virtual ~DmaDevice() { }
+ void dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
+ uint32_t sid, uint32_t ssid, Tick delay = 0)
+ {
+ dmaPort.dmaAction(MemCmd::WriteReq, addr, size, event, data,
+ sid, ssid, delay);
+ }
+
void dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
Tick delay = 0)
{
dmaPort.dmaAction(MemCmd::WriteReq, addr, size, event, data, delay);
}
+ void dmaRead(Addr addr, int size, Event *event, uint8_t *data,
+ uint32_t sid, uint32_t ssid, Tick delay = 0)
+ {
+ dmaPort.dmaAction(MemCmd::ReadReq, addr, size, event, data,
+ sid, ssid, delay);
+ }
+
void dmaRead(Addr addr, int size, Event *event, uint8_t *data,
Tick delay = 0)
{