ARM: Make GIC function that should only be called by GIC protected.

[gem5.git] / src / dev / ide_ctrl.cc

diff --git a/src/dev/ide_ctrl.cc b/src/dev/ide_ctrl.cc
index 8e9b673ac3ce9c4c4e584fbed1e20daa4dd63bad..291ce1389910a66ad80d60c2a292e60b43167214 100644 (file)
--- a/src/dev/ide_ctrl.cc
+++ b/src/dev/ide_ctrl.cc
@@ -34,6 +34,7 @@
 
 #include "base/trace.hh"
 #include "cpu/intr_control.hh"
+#include "debug/IdeCtrl.hh"
 #include "dev/ide_ctrl.hh"
 #include "dev/ide_disk.hh"
 #include "mem/packet.hh"
@@ -210,7 +211,10 @@ IdeController::readConfig(PacketPtr pkt)
                 (uint32_t)pkt->get<uint16_t>());
         break;
       case sizeof(uint32_t):
-        panic("No 32bit reads implemented for this device.");
+        if (offset == IDEConfig)
+            pkt->set<uint32_t>(ideConfig);
+        else
+            panic("No 32bit reads implemented for this device.");
         DPRINTF(IdeCtrl, "PCI read offset: %#x size: 4 data: %#x\n", offset,
                 (uint32_t)pkt->get<uint32_t>());
         break;
@@ -274,7 +278,10 @@ IdeController::writeConfig(PacketPtr pkt)
                     offset, (uint32_t)pkt->get<uint16_t>());
             break;
           case sizeof(uint32_t):
-            panic("Write of unimplemented PCI config. register: %x\n", offset);
+            if (offset == IDEConfig)
+                ideConfig = pkt->get<uint32_t>();
+            else
+                panic("Write of unimplemented PCI config. register: %x\n", offset);
             break;
           default:
             panic("invalid access size(?) for PCI configspace!\n");
@@ -311,6 +318,7 @@ IdeController::writeConfig(PacketPtr pkt)
         break;
 
       case PCI_COMMAND:
+        DPRINTF(IdeCtrl, "Writing to PCI Command val: %#x\n", config.command);
         ioEnabled = (config.command & htole(PCI_CMD_IOSE));
         bmEnabled = (config.command & htole(PCI_CMD_BME));
         break;