arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher

[gem5.git] / src / dev / intel_8254_timer.cc

diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index 75600fb72d8401e04879d866bcb802eb68a8cf5f..5a0174d77311f79b5b7cd8bfc3d0e0a9458a260a 100644 (file)
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -30,10 +30,11 @@
  *          Miguel J. Serrano
  */
 
-#include "base/misc.hh"
-#include "debug/Intel8254Timer.hh"
 #include "dev/intel_8254_timer.hh"
 
+#include "base/logging.hh"
+#include "debug/Intel8254Timer.hh"
+
 using namespace std;
 
 Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
@@ -110,7 +111,7 @@ void
 Intel8254Timer::Counter::latchCount()
 {
     // behave like a real latch
-    if(!latch_on) {
+    if (!latch_on) {
         latch_on = true;
         read_byte = LSB;
         latched_count = currentCount();
@@ -207,7 +208,7 @@ Intel8254Timer::Counter::setRW(int rw_val)
 void
 Intel8254Timer::Counter::setMode(int mode_val)
 {
-    if(mode_val != InitTc && mode_val != RateGen &&
+    if (mode_val != InitTc && mode_val != RateGen &&
        mode_val != SquareWave)
         panic("PIT mode %#x is not implemented: \n", mode_val);