arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher

[gem5.git] / src / dev / isa_fake.cc

diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index 81c7a4dcdcb35feae87a78749fca66303993c7f4..407d08ca458bedf720f2e64aba3fa5b7f21c7110 100644 (file)
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -32,9 +32,10 @@
  * Isa Fake Device implementation
  */
 
+#include "dev/isa_fake.hh"
+
 #include "base/trace.hh"
 #include "debug/IsaFake.hh"
-#include "dev/isa_fake.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
@@ -53,7 +54,6 @@ IsaFake::IsaFake(Params *p)
 Tick
 IsaFake::read(PacketPtr pkt)
 {
-    pkt->allocate();
     pkt->makeAtomicResponse();
 
     if (params()->warn_access != "")
@@ -69,16 +69,16 @@ IsaFake::read(PacketPtr pkt)
                 pkt->getAddr(), pkt->getSize());
         switch (pkt->getSize()) {
           case sizeof(uint64_t):
-             pkt->set(retData64);
+             pkt->setLE(retData64);
              break;
           case sizeof(uint32_t):
-             pkt->set(retData32);
+             pkt->setLE(retData32);
              break;
           case sizeof(uint16_t):
-             pkt->set(retData16);
+             pkt->setLE(retData16);
              break;
           case sizeof(uint8_t):
-             pkt->set(retData8);
+             pkt->setLE(retData8);
              break;
           default:
              if (params()->fake_mem)
@@ -98,19 +98,19 @@ IsaFake::write(PacketPtr pkt)
         uint64_t data;
         switch (pkt->getSize()) {
           case sizeof(uint64_t):
-            data = pkt->get<uint64_t>();
+            data = pkt->getLE<uint64_t>();
             break;
           case sizeof(uint32_t):
-            data = pkt->get<uint32_t>();
+            data = pkt->getLE<uint32_t>();
             break;
           case sizeof(uint16_t):
-            data = pkt->get<uint16_t>();
+            data = pkt->getLE<uint16_t>();
             break;
           case sizeof(uint8_t):
-            data = pkt->get<uint8_t>();
+            data = pkt->getLE<uint8_t>();
             break;
           default:
-            panic("invalid access size!\n");
+            panic("invalid access size: %u\n", pkt->getSize());
         }
         warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
                 name(), pkt->getAddr(), pkt->getSize(), data);
@@ -126,16 +126,16 @@ IsaFake::write(PacketPtr pkt)
         if (params()->update_data) {
             switch (pkt->getSize()) {
               case sizeof(uint64_t):
-                retData64 = pkt->get<uint64_t>();
+                retData64 = pkt->getLE<uint64_t>();
                 break;
               case sizeof(uint32_t):
-                retData32 = pkt->get<uint32_t>();
+                retData32 = pkt->getLE<uint32_t>();
                 break;
               case sizeof(uint16_t):
-                retData16 = pkt->get<uint16_t>();
+                retData16 = pkt->getLE<uint16_t>();
                 break;
               case sizeof(uint8_t):
-                retData8 = pkt->get<uint8_t>();
+                retData8 = pkt->getLE<uint8_t>();
                 break;
               default:
                 panic("invalid access size!\n");