sparc: Use big endian packet accessors.

[gem5.git] / src / dev / isa_fake.cc

diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index 21b723bdca6be5b874a9a631ac2022ce9f02c99c..92ee19a97711ff261563432faa5c37eb7cf50a49 100644 (file)
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -32,9 +32,10 @@
  * Isa Fake Device implementation
  */
 
+#include "dev/isa_fake.hh"
+
 #include "base/trace.hh"
 #include "debug/IsaFake.hh"
-#include "dev/isa_fake.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
@@ -42,11 +43,8 @@
 using namespace std;
 
 IsaFake::IsaFake(Params *p)
-    : BasicPioDevice(p)
+    : BasicPioDevice(p, p->ret_bad_addr ? 0 : p->pio_size)
 {
-    if (!p->ret_bad_addr)
-        pioSize = p->pio_size;
-
     retData8 = p->ret_data8;
     retData16 = p->ret_data16;
     retData32 = p->ret_data32;
@@ -56,8 +54,8 @@ IsaFake::IsaFake(Params *p)
 Tick
 IsaFake::read(PacketPtr pkt)
 {
-
     pkt->makeAtomicResponse();
+
     if (params()->warn_access != "")
         warn("Device %s accessed by read to address %#x size=%d\n",
                 name(), pkt->getAddr(), pkt->getSize());
@@ -83,7 +81,10 @@ IsaFake::read(PacketPtr pkt)
              pkt->set(retData8);
              break;
           default:
-            panic("invalid access size!\n");
+             if (params()->fake_mem)
+                 std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
+             else
+                 panic("invalid access size! Device being accessed by cache?\n");
         }
     }
     return pioDelay;
@@ -109,7 +110,7 @@ IsaFake::write(PacketPtr pkt)
             data = pkt->get<uint8_t>();
             break;
           default:
-            panic("invalid access size!\n");
+            panic("invalid access size: %u\n", pkt->getSize());
         }
         warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
                 name(), pkt->getAddr(), pkt->getSize(), data);