* Miguel Serrano
*/
+#include "dev/mc146818.hh"
+
#include <sys/time.h>
-#include <time.h>
+#include <ctime>
#include <string>
+#include "base/bitfield.hh"
#include "base/time.hh"
#include "base/trace.hh"
-#include "dev/mc146818.hh"
+#include "debug/MC146818.hh"
#include "dev/rtcreg.h"
using namespace std;
-MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
- bool bcd, Tick frequency)
- : EventManager(em), _name(n), event(this, frequency)
+static uint8_t
+bcdize(uint8_t val)
{
- memset(clock_data, 0, sizeof(clock_data));
- stat_regA = RTCA_32768HZ | RTCA_1024HZ;
- stat_regB = RTCB_PRDC_IE |RTCB_BIN | RTCB_24HR;
-
- year = time.tm_year;
+ uint8_t result;
+ result = val % 10;
+ result += (val / 10) << 4;
+ return result;
+}
- if (bcd) {
- // The datasheet says that the year field can be either BCD or
- // years since 1900. Linux seems to be happy with years since
- // 1900.
- year = year % 100;
- int tens = year / 10;
- int ones = year % 10;
- year = (tens << 4) + ones;
- }
+static uint8_t
+unbcdize(uint8_t val)
+{
+ uint8_t result;
+ result = val & 0xf;
+ result += (val >> 4) * 10;
+ return result;
+}
+void
+MC146818::setTime(const struct tm time)
+{
+ curTime = time;
+ year = time.tm_year;
// Unix is 0-11 for month, data seet says start at 1
mon = time.tm_mon + 1;
mday = time.tm_mday;
// Datasheet says 1 is sunday
wday = time.tm_wday + 1;
+ if (!stat_regB.dm) {
+ // The datasheet says that the year field can be either BCD or
+ // years since 1900. Linux seems to be happy with years since
+ // 1900.
+ year = bcdize(year % 100);
+ mon = bcdize(mon);
+ mday = bcdize(mday);
+ hour = bcdize(hour);
+ min = bcdize(min);
+ sec = bcdize(sec);
+ }
+}
+
+MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
+ bool bcd, Tick frequency)
+ : EventManager(em), _name(n), event(this, frequency), tickEvent(this)
+{
+ memset(clock_data, 0, sizeof(clock_data));
+
+ stat_regA = 0;
+ stat_regA.dv = RTCA_DV_32768HZ;
+ stat_regA.rs = RTCA_RS_1024HZ;
+
+ stat_regB = 0;
+ stat_regB.pie = 1;
+ stat_regB.format24h = 1;
+ stat_regB.dm = bcd ? 0 : 1;
+
+ setTime(time);
DPRINTFN("Real-time clock set to %s", asctime(&time));
}
MC146818::~MC146818()
{
+ deschedule(tickEvent);
+ deschedule(event);
+}
+
+bool
+MC146818::rega_dv_disabled(const RtcRegA ®)
+{
+ return reg.dv == RTCA_DV_DISABLED0 ||
+ reg.dv == RTCA_DV_DISABLED1;
+}
+
+void
+MC146818::startup()
+{
+ assert(!event.scheduled());
+ assert(!tickEvent.scheduled());
+
+ if (stat_regB.pie)
+ schedule(event, curTick() + event.offset);
+ if (!rega_dv_disabled(stat_regA))
+ schedule(tickEvent, curTick() + tickEvent.offset);
}
void
MC146818::writeData(const uint8_t addr, const uint8_t data)
{
- if (addr < RTC_STAT_REGA)
+ bool panic_unsupported(false);
+
+ if (addr < RTC_STAT_REGA) {
clock_data[addr] = data;
- else {
+ curTime.tm_sec = unbcdize(sec);
+ curTime.tm_min = unbcdize(min);
+ curTime.tm_hour = unbcdize(hour);
+ curTime.tm_mday = unbcdize(mday);
+ curTime.tm_mon = unbcdize(mon) - 1;
+ curTime.tm_year = ((unbcdize(year) + 50) % 100) + 1950;
+ curTime.tm_wday = unbcdize(wday) - 1;
+ } else {
switch (addr) {
- case RTC_STAT_REGA:
- if (data != (RTCA_32768HZ | RTCA_1024HZ))
- panic("Unimplemented RTC register A value write!\n");
- stat_regA = data;
- break;
+ case RTC_STAT_REGA: {
+ RtcRegA old_rega(stat_regA);
+ stat_regA = data;
+ // The "update in progress" bit is read only.
+ stat_regA.uip = old_rega;
+
+ if (!rega_dv_disabled(stat_regA) &&
+ stat_regA.dv != RTCA_DV_32768HZ) {
+ inform("RTC: Unimplemented divider configuration: %i\n",
+ stat_regA.dv);
+ panic_unsupported = true;
+ }
+
+ if (stat_regA.rs != RTCA_RS_1024HZ) {
+ inform("RTC: Unimplemented interrupt rate: %i\n",
+ stat_regA.rs);
+ panic_unsupported = true;
+ }
+
+ if (rega_dv_disabled(stat_regA)) {
+ // The divider is disabled, make sure that we don't
+ // schedule any ticks.
+ if (tickEvent.scheduled())
+ deschedule(tickEvent);
+ } else if (rega_dv_disabled(old_rega)) {
+ // According to the specification, the next tick
+ // happens after 0.5s when the divider chain goes
+ // from reset to active. So, we simply schedule the
+ // tick after 0.5s.
+ assert(!tickEvent.scheduled());
+ schedule(tickEvent, curTick() + SimClock::Int::s / 2);
+ }
+ } break;
case RTC_STAT_REGB:
- if ((data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != (RTCB_BIN | RTCB_24HR))
- panic("Write to RTC reg B bits that are not implemented!\n");
+ stat_regB = data;
+ if (stat_regB.aie || stat_regB.uie) {
+ inform("RTC: Unimplemented interrupt configuration: %s %s\n",
+ stat_regB.aie ? "alarm" : "",
+ stat_regB.uie ? "update" : "");
+ panic_unsupported = true;
+ }
+
+ if (stat_regB.dm) {
+ inform("RTC: The binary interface is not fully implemented.\n");
+ panic_unsupported = true;
+ }
+
+ if (!stat_regB.format24h) {
+ inform("RTC: The 12h time format not supported.\n");
+ panic_unsupported = true;
+ }
- if (data & RTCB_PRDC_IE) {
+ if (stat_regB.dse) {
+ inform("RTC: Automatic daylight saving time not supported.\n");
+ panic_unsupported = true;
+ }
+
+ if (stat_regB.pie) {
if (!event.scheduled())
event.scheduleIntr();
} else {
if (event.scheduled())
deschedule(event);
}
- stat_regB = data;
break;
case RTC_STAT_REGC:
case RTC_STAT_REGD:
break;
}
}
+
+ if (panic_unsupported)
+ panic("Unimplemented RTC configuration!\n");
+
}
uint8_t
switch (addr) {
case RTC_STAT_REGA:
// toggle UIP bit for linux
- stat_regA ^= RTCA_UIP;
+ stat_regA.uip = !stat_regA.uip;
return stat_regA;
break;
case RTC_STAT_REGB:
}
void
-MC146818::serialize(const string &base, ostream &os)
+MC146818::tickClock()
{
- arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
- paramOut(os, base + ".stat_regA", stat_regA);
- paramOut(os, base + ".stat_regB", stat_regB);
+ assert(!rega_dv_disabled(stat_regA));
+
+ if (stat_regB.set)
+ return;
+ time_t calTime = mkutctime(&curTime);
+ calTime++;
+ setTime(*gmtime(&calTime));
}
void
-MC146818::unserialize(const string &base, Checkpoint *cp,
- const string §ion)
+MC146818::serialize(const string &base, CheckpointOut &cp) const
{
- arrayParamIn(cp, section, base + ".clock_data", clock_data,
+ uint8_t regA_serial(stat_regA);
+ uint8_t regB_serial(stat_regB);
+
+ arrayParamOut(cp, base + ".clock_data", clock_data, sizeof(clock_data));
+ paramOut(cp, base + ".stat_regA", (uint8_t)regA_serial);
+ paramOut(cp, base + ".stat_regB", (uint8_t)regB_serial);
+
+ //
+ // save the timer tick and rtc clock tick values to correctly reschedule
+ // them during unserialize
+ //
+ Tick rtcTimerInterruptTickOffset = event.when() - curTick();
+ SERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+ Tick rtcClockTickOffset = tickEvent.when() - curTick();
+ SERIALIZE_SCALAR(rtcClockTickOffset);
+}
+
+void
+MC146818::unserialize(const string &base, CheckpointIn &cp)
+{
+ uint8_t tmp8;
+
+ arrayParamIn(cp, base + ".clock_data", clock_data,
sizeof(clock_data));
- paramIn(cp, section, base + ".stat_regA", stat_regA);
- paramIn(cp, section, base + ".stat_regB", stat_regB);
- // We're not unserializing the event here, but we need to
- // rescehedule the event since curTick was moved forward by the
- // checkpoint
- reschedule(event, curTick + event.interval);
+ paramIn(cp, base + ".stat_regA", tmp8);
+ stat_regA = tmp8;
+ paramIn(cp, base + ".stat_regB", tmp8);
+ stat_regB = tmp8;
+
+ //
+ // properly schedule the timer and rtc clock events
+ //
+ Tick rtcTimerInterruptTickOffset;
+ UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+ event.offset = rtcTimerInterruptTickOffset;
+ Tick rtcClockTickOffset;
+ UNSERIALIZE_SCALAR(rtcClockTickOffset);
+ tickEvent.offset = rtcClockTickOffset;
}
MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
- : parent(_parent), interval(i)
+ : parent(_parent), interval(i), offset(i)
{
DPRINTF(MC146818, "RTC Event Initilizing\n");
- parent->schedule(this, curTick + interval);
}
void
MC146818::RTCEvent::scheduleIntr()
{
- parent->schedule(this, curTick + interval);
+ parent->schedule(this, curTick() + interval);
}
void
MC146818::RTCEvent::process()
{
DPRINTF(MC146818, "RTC Timer Interrupt\n");
- parent->schedule(this, curTick + interval);
+ parent->schedule(this, curTick() + interval);
parent->handleEvent();
}
{
return "RTC interrupt";
}
+
+void
+MC146818::RTCTickEvent::process()
+{
+ DPRINTF(MC146818, "RTC clock tick\n");
+ parent->schedule(this, curTick() + SimClock::Int::s);
+ parent->tickClock();
+}
+
+const char *
+MC146818::RTCTickEvent::description() const
+{
+ return "RTC clock tick";
+}
projects / gem5.git / blobdiff