#ifndef __DEV_MC146818_HH__
#define __DEV_MC146818_HH__
-#include "base/range.hh"
-#include "sim/eventq.hh"
+#include "base/bitunion.hh"
+#include "base/logging.hh"
+#include "sim/eventq_impl.hh"
/** Real-Time Clock (MC146818) */
-class MC146818
+class MC146818 : public EventManager
{
protected:
virtual void handleEvent()
{
MC146818 * parent;
Tick interval;
+ Tick offset;
RTCEvent(MC146818 * _parent, Tick i);
virtual const char *description() const;
};
+ /** Event for RTC periodic interrupt */
+ struct RTCTickEvent : public Event
+ {
+ MC146818 * parent;
+ Tick offset;
+
+ RTCTickEvent(MC146818 * _parent) :
+ parent(_parent), offset(SimClock::Int::s)
+ {}
+
+ /** Event process to occur at interrupt*/
+ void process();
+
+ /** Event description */
+ const char *description() const;
+ };
+
private:
std::string _name;
const std::string &name() const { return _name; }
/** RTC periodic interrupt event */
RTCEvent event;
+ /** RTC tick event */
+ RTCTickEvent tickEvent;
+
/** Data for real-time clock function */
union {
uint8_t clock_data[10];
};
};
+ struct tm curTime;
+
+ void setTime(const struct tm time);
+
+ BitUnion8(RtcRegA)
+ Bitfield<7> uip; /// 1 = date and time update in progress
+ Bitfield<6, 4> dv; /// Divider configuration
+ /** Rate selection
+ 0 = Disabled
+ For 32768 Hz time bases:
+ Freq = 32768Hz / 2**(n-1) for n >= 3
+ Freq = 256Hz if n = 1
+ Freq = 128Hz if n = 2
+ Othwerise:
+ Freq = 32768Hz / 2**(n-1)
+ */
+ Bitfield<3, 0> rs;
+ EndBitUnion(RtcRegA)
+
+ /// Is the DV field in regA set to disabled?
+ static inline bool rega_dv_disabled(const RtcRegA ®);
+
+ BitUnion8(RtcRegB)
+ Bitfield<7> set; /// stop clock updates
+ Bitfield<6> pie; /// 1 = enable periodic clock interrupt
+ Bitfield<5> aie; /// 1 = enable alarm interrupt
+ Bitfield<4> uie; /// 1 = enable update-ended interrupt
+ Bitfield<3> sqwe; /// 1 = output sqare wave at SQW pin
+ Bitfield<2> dm; /// 0 = BCD, 1 = Binary coded time
+ Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours
+ Bitfield<0> dse; /// USA Daylight Savings Time enable
+ EndBitUnion(RtcRegB)
+
/** RTC status register A */
- uint8_t stat_regA;
+ RtcRegA stat_regA;
/** RTC status register B */
- uint8_t stat_regB;
+ RtcRegB stat_regB;
public:
- virtual ~MC146818()
- {}
-
- MC146818(const std::string &name, const struct tm time,
+ MC146818(EventManager *em, const std::string &name, const struct tm time,
bool bcd, Tick frequency);
+ virtual ~MC146818();
+
+ /** Start ticking */
+ virtual void startup();
/** RTC write data */
void writeData(const uint8_t addr, const uint8_t data);
/** RTC read data */
uint8_t readData(const uint8_t addr);
+ void tickClock();
+
/**
* Serialize this object to the given output stream.
* @param base The base name of the counter object.
* @param os The stream to serialize to.
*/
- void serialize(const std::string &base, std::ostream &os);
+ void serialize(const std::string &base, CheckpointOut &cp) const;
/**
* Reconstruct the state of this object from a checkpoint.
* @param cp The checkpoint use.
* @param section The section name of this object
*/
- void unserialize(const std::string &base, Checkpoint *cp,
- const std::string §ion);
+ void unserialize(const std::string &base, CheckpointIn &cp);
};
#endif // __DEV_MC146818_HH__