#include "base/inet.hh"
#include "base/statistics.hh"
+#include "dev/etherdevice.hh"
#include "dev/etherint.hh"
#include "dev/etherpkt.hh"
#include "dev/io_device.hh"
#include "dev/ns_gige_reg.h"
-#include "dev/pcidev.hh"
#include "dev/pktfifo.hh"
#include "params/NSGigE.hh"
#include "sim/eventq.hh"
/**
* NS DP83820 Ethernet device model
*/
-class NSGigE : public PciDev
+class NSGigE : public EtherDevice
{
public:
/** Transmit State Machine states */
/* state machine cycle time */
Tick clock;
- inline Tick cycles(int numCycles) const { return numCycles * clock; }
+ inline Tick ticks(int numCycles) const { return numCycles * clock; }
/* tx State Machine */
TxState txState;
NSGigE(Params *params);
~NSGigE();
+ virtual EtherInt *getEthPort(const std::string &if_name, int idx);
+
virtual Tick writeConfig(PacketPtr pkt);
virtual Tick read(PacketPtr pkt);
bool recvPacket(EthPacketPtr packet);
void transferDone();
- void setInterface(NSGigEInt *i) { assert(!interface); interface = i; }
-
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string §ion);
public:
NSGigEInt(const std::string &name, NSGigE *d)
- : EtherInt(name), dev(d) { dev->setInterface(this); }
+ : EtherInt(name), dev(d)
+ { }
virtual bool recvPacket(EthPacketPtr pkt) { return dev->recvPacket(pkt); }
virtual void sendDone() { dev->transferDone(); }