/*
+ * Copyright (c) 2013 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2004-2005 The Regents of The University of Michigan
* All rights reserved.
*
#define __DEV_PCIDEV_HH__
#include <cstring>
+#include <vector>
-#include "dev/io_device.hh"
+#include "dev/dma_device.hh"
#include "dev/pcireg.h"
#include "dev/platform.hh"
+#include "params/PciDevice.hh"
#include "sim/byteswap.hh"
#define BAR_IO_MASK 0x3
#define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
-/**
- * This class encapulates the first 64 bytes of a singles PCI
- * devices config space that in configured by the configuration file.
- */
-class PciConfigData : public SimObject
-{
- public:
- /**
- * Constructor to initialize the devices config space to 0.
- */
- PciConfigData(const std::string &name)
- : SimObject(name)
- {
- std::memset(config.data, 0, sizeof(config.data));
- std::memset(BARSize, 0, sizeof(BARSize));
- }
-
- /** The first 64 bytes */
- PCIConfig config;
-
- /** The size of the BARs */
- uint32_t BARSize[6];
-};
-
/**
* PCI device, base implementation is only config space.
*/
-class PciDev : public DmaDevice
+class PciDevice : public DmaDevice
{
class PciConfigPort : public SimpleTimingPort
{
protected:
- PciDev *device;
+ PciDevice *device;
virtual Tick recvAtomic(PacketPtr pkt);
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- AddrRangeList &snoop);
+ virtual AddrRangeList getAddrRanges() const;
Platform *platform;
Addr configAddr;
public:
- PciConfigPort(PciDev *dev, int busid, int devid, int funcid,
+ PciConfigPort(PciDevice *dev, int busid, int devid, int funcid,
Platform *p);
};
public:
- struct Params : public DmaDevice::Params
+ typedef PciDeviceParams Params;
+ const Params *
+ params() const
{
- /**
- * A pointer to the object that contains the first 64 bytes of
- * config space
- */
- PciConfigData *configData;
+ return dynamic_cast<const Params *>(_params);
+ }
- /** The bus number we are on */
- uint32_t busNum;
+ protected:
+ /** The current config space. */
+ PCIConfig config;
+ /** The capability list structures and base addresses
+ * @{
+ */
+ const int PMCAP_BASE;
+ PMCAP pmcap;
- /** The device number we have */
- uint32_t deviceNum;
+ const int MSICAP_BASE;
+ MSICAP msicap;
- /** The function number */
- uint32_t functionNum;
+ const int MSIXCAP_BASE;
+ MSIXCAP msixcap;
- /** The latency for pio accesses. */
- Tick pio_delay;
+ const int PXCAP_BASE;
+ PXCAP pxcap;
+ /** @} */
- /** The latency for a config access. */
- Tick config_delay;
- };
-
- public:
- const Params *params() const { return (const Params *)_params; }
-
- protected:
- /** The current config space. Unlike the PciConfigData this is
- * updated during simulation while continues to reflect what was
- * in the config file.
- */
- PCIConfig config;
+ /** MSIX Table and PBA Structures */
+ std::vector<MSIXTable> msix_table;
+ std::vector<MSIXPbaEntry> msix_pba;
/** The size of the BARs */
uint32_t BARSize[6];
/** The current address mapping of the BARs */
Addr BARAddrs[6];
+ /** Whether the BARs are really hardwired legacy IO locations. */
+ bool legacyIO[6];
+
/**
* Does the given address lie within the space mapped by the given
* base address register?
}
protected:
- Platform *plat;
- PciConfigData *configData;
+ Platform *platform;
Tick pioDelay;
Tick configDelay;
- PciConfigPort *configPort;
+ PciConfigPort configPort;
/**
* Write to the PCI config space data that is stored locally. This may be
public:
Addr pciToDma(Addr pciAddr) const
- { return plat->pciToDma(pciAddr); }
+ { return platform->pciToDma(pciAddr); }
void
intrPost()
- { plat->postPciInt(letoh(configData->config.interruptLine)); }
+ { platform->postPciInt(letoh(config.interruptLine)); }
void
intrClear()
- { plat->clearPciInt(letoh(configData->config.interruptLine)); }
+ { platform->clearPciInt(letoh(config.interruptLine)); }
uint8_t
interruptLine()
- { return letoh(configData->config.interruptLine); }
+ { return letoh(config.interruptLine); }
- /** return the address ranges that this device responds to.
- * @params range_list range list to populate with ranges
+ /**
+ * Determine the address ranges that this device responds to.
+ *
+ * @return a list of non-overlapping address ranges
*/
- void addressRanges(AddrRangeList &range_list);
+ AddrRangeList getAddrRanges() const;
/**
* Constructor for PCI Dev. This function copies data from the
* config file object PCIConfigData and registers the device with
* a PciConfigAll object.
*/
- PciDev(Params *params);
+ PciDevice(const Params *params);
virtual void init();
virtual void unserialize(Checkpoint *cp, const std::string §ion);
- virtual unsigned int drain(Event *de);
+ virtual unsigned int drain(DrainManager *dm);
- virtual Port *getPort(const std::string &if_name, int idx = -1)
+ virtual BaseSlavePort &getSlavePort(const std::string &if_name,
+ PortID idx = InvalidPortID)
{
if (if_name == "config") {
- if (configPort != NULL)
- panic("pciconfig port already connected to.");
- configPort = new PciConfigPort(this, params()->busNum,
- params()->deviceNum, params()->functionNum,
- params()->platform);
return configPort;
}
- return DmaDevice::getPort(if_name, idx);
+ return DmaDevice::getSlavePort(if_name, idx);
}
};
projects / gem5.git / blobdiff