X86: Make the real time clock actually keep track of time.

[gem5.git] / src / dev / pcidev.hh

diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index a0809268987261ab433c769cb4cf6d9dca6b6b30..5da8b2dfcdbfa4c51a4692401ef87cbf76476e32 100644 (file)
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -52,30 +52,6 @@
 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
 
 
-/**
- * This class encapulates the first 64 bytes of a singles PCI
- * devices config space that in configured by the configuration file.
- */
-class PciConfigData : public SimObject
-{
-  public:
-    /**
-     * Constructor to initialize the devices config space to 0.
-     */
-    PciConfigData(const std::string &name)
-        : SimObject(name)
-    {
-        std::memset(config.data, 0, sizeof(config.data));
-        std::memset(BARSize, 0, sizeof(BARSize));
-    }
-
-    /** The first 64 bytes */
-    PCIConfig config;
-
-    /** The size of the BARs */
-    uint32_t BARSize[6];
-};
-
 
 /**
  * PCI device, base implementation is only config space.
@@ -114,10 +90,7 @@ class PciDev : public DmaDevice
     }
 
   protected:
-    /** The current config space. Unlike the PciConfigData this is
-     * updated during simulation while continues to reflect what was
-     * in the config file.
-     */
+    /** The current config space.  */
     PCIConfig config;
 
     /** The size of the BARs */
@@ -126,6 +99,9 @@ class PciDev : public DmaDevice
     /** The current address mapping of the BARs */
     Addr BARAddrs[6];
 
+    /** Whether the BARs are really hardwired legacy IO locations. */
+    bool legacyIO[6];
+
     /**
      * Does the given address lie within the space mapped by the given
      * base address register?
@@ -174,7 +150,6 @@ class PciDev : public DmaDevice
 
   protected:
     Platform *plat;
-    PciConfigData *configData;
     Tick pioDelay;
     Tick configDelay;
     PciConfigPort *configPort;
@@ -202,15 +177,15 @@ class PciDev : public DmaDevice
 
     void
     intrPost()
-    { plat->postPciInt(letoh(configData->config.interruptLine)); }
+    { plat->postPciInt(letoh(config.interruptLine)); }
 
     void
     intrClear()
-    { plat->clearPciInt(letoh(configData->config.interruptLine)); }
+    { plat->clearPciInt(letoh(config.interruptLine)); }
 
     uint8_t
     interruptLine()
-    { return letoh(configData->config.interruptLine); }
+    { return letoh(config.interruptLine); }
 
     /** return the address ranges that this device responds to.
      * @params range_list range list to populate with ranges
@@ -222,7 +197,7 @@ class PciDev : public DmaDevice
      * config file object PCIConfigData and registers the device with
      * a PciConfigAll object.
      */
-    PciDev(Params *params);
+    PciDev(const Params *params);
 
     virtual void init();