#include "dev/pcidev.hh"
#include "dev/pktfifo.hh"
#include "dev/sinicreg.hh"
+#include "params/Sinic.hh"
#include "sim/eventq.hh"
namespace Sinic {
bool rxEnable;
bool txEnable;
Tick clock;
- inline Tick cycles(int numCycles) const { return numCycles * clock; }
+ inline Tick ticks(int numCycles) const { return numCycles * clock; }
protected:
Tick intrDelay;
* Construction/Destruction/Parameters
*/
public:
- struct Params : public PciDev::Params
- {
- Tick clock;
- Tick intr_delay;
- };
-
- Base(Params *p);
+ typedef SinicParams Params;
+ const Params *params() const { return (const Params *)_params; }
+ Base(const Params *p);
};
class Device : public Base
uint32_t IntrMask; // 0x0c
uint32_t RxMaxCopy; // 0x10
uint32_t TxMaxCopy; // 0x14
- uint32_t RxMaxIntr; // 0x18
- uint32_t VirtualCount; // 0x1c
- uint32_t RxFifoSize; // 0x20
- uint32_t TxFifoSize; // 0x24
- uint32_t RxFifoMark; // 0x28
- uint32_t TxFifoMark; // 0x2c
- uint64_t RxData; // 0x30
- uint64_t RxDone; // 0x38
- uint64_t RxWait; // 0x40
- uint64_t TxData; // 0x48
- uint64_t TxDone; // 0x50
- uint64_t TxWait; // 0x58
- uint64_t HwAddr; // 0x60
+ uint32_t ZeroCopySize; // 0x18
+ uint32_t ZeroCopyMark; // 0x1c
+ uint32_t VirtualCount; // 0x20
+ uint32_t RxMaxIntr; // 0x24
+ uint32_t RxFifoSize; // 0x28
+ uint32_t TxFifoSize; // 0x2c
+ uint32_t RxFifoLow; // 0x30
+ uint32_t TxFifoLow; // 0x34
+ uint32_t RxFifoHigh; // 0x38
+ uint32_t TxFifoHigh; // 0x3c
+ uint64_t RxData; // 0x40
+ uint64_t RxDone; // 0x48
+ uint64_t RxWait; // 0x50
+ uint64_t TxData; // 0x58
+ uint64_t TxDone; // 0x60
+ uint64_t TxWait; // 0x68
+ uint64_t HwAddr; // 0x70
+ uint64_t RxStatus; // 0x78
} regs;
struct VirtualReg {
uint64_t TxData;
uint64_t TxDone;
- PacketFifo::iterator rxPacket;
- int rxPacketOffset;
- int rxPacketBytes;
+ PacketFifo::iterator rxIndex;
+ unsigned rxPacketOffset;
+ unsigned rxPacketBytes;
uint64_t rxDoneData;
Counter rxUnique;
{ }
};
typedef std::vector<VirtualReg> VirtualRegs;
- typedef std::list<int> VirtualList;
+ typedef std::list<unsigned> VirtualList;
Counter rxUnique;
Counter txUnique;
VirtualRegs virtualRegs;
int rxActive;
VirtualList txList;
+ int rxBusyCount;
+ int rxMappedCount;
+ int rxDirtyCount;
+
uint8_t ®Data8(Addr daddr) { return *((uint8_t *)®s + daddr); }
uint32_t ®Data32(Addr daddr) { return *(uint32_t *)®Data8(daddr); }
uint64_t ®Data64(Addr daddr) { return *(uint64_t *)®Data8(daddr); }
bool rxLow;
Addr rxDmaAddr;
uint8_t *rxDmaData;
- int rxDmaLen;
+ unsigned rxDmaLen;
TxState txState;
PacketFifo txFifo;
public:
bool recvPacket(EthPacketPtr packet);
void transferDone();
- void setInterface(Interface *i) { assert(!interface); interface = i; }
+ virtual EtherInt *getEthPort(const std::string &if_name, int idx);
/**
* DMA parameters
* Memory Interface
*/
public:
- virtual Tick read(Packet *pkt);
- virtual Tick write(Packet *pkt);
+ virtual Tick read(PacketPtr pkt);
+ virtual Tick write(PacketPtr pkt);
+ virtual void resume();
void prepareIO(int cpu, int index);
void prepareRead(int cpu, int index);
* Statistics
*/
private:
- Stats::Scalar<> rxBytes;
+ Stats::Scalar rxBytes;
Stats::Formula rxBandwidth;
- Stats::Scalar<> rxPackets;
+ Stats::Scalar rxPackets;
Stats::Formula rxPacketRate;
- Stats::Scalar<> rxIpPackets;
- Stats::Scalar<> rxTcpPackets;
- Stats::Scalar<> rxUdpPackets;
- Stats::Scalar<> rxIpChecksums;
- Stats::Scalar<> rxTcpChecksums;
- Stats::Scalar<> rxUdpChecksums;
-
- Stats::Scalar<> txBytes;
+ Stats::Scalar rxIpPackets;
+ Stats::Scalar rxTcpPackets;
+ Stats::Scalar rxUdpPackets;
+ Stats::Scalar rxIpChecksums;
+ Stats::Scalar rxTcpChecksums;
+ Stats::Scalar rxUdpChecksums;
+
+ Stats::Scalar txBytes;
Stats::Formula txBandwidth;
Stats::Formula totBandwidth;
Stats::Formula totPackets;
Stats::Formula totBytes;
Stats::Formula totPacketRate;
- Stats::Scalar<> txPackets;
+ Stats::Scalar txPackets;
Stats::Formula txPacketRate;
- Stats::Scalar<> txIpPackets;
- Stats::Scalar<> txTcpPackets;
- Stats::Scalar<> txUdpPackets;
- Stats::Scalar<> txIpChecksums;
- Stats::Scalar<> txTcpChecksums;
- Stats::Scalar<> txUdpChecksums;
+ Stats::Scalar txIpPackets;
+ Stats::Scalar txTcpPackets;
+ Stats::Scalar txUdpPackets;
+ Stats::Scalar txIpChecksums;
+ Stats::Scalar txTcpChecksums;
+ Stats::Scalar txUdpChecksums;
+
+ Stats::Scalar totalVnicDistance;
+ Stats::Scalar numVnicDistance;
+ Stats::Scalar maxVnicDistance;
+ Stats::Formula avgVnicDistance;
+
+ int _maxVnicDistance;
public:
virtual void regStats();
+ virtual void resetStats();
/**
* Serialization stuff
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string §ion);
-/**
- * Construction/Destruction/Parameters
- */
- public:
- struct Params : public Base::Params
- {
- Tick tx_delay;
- Tick rx_delay;
- bool rx_filter;
- Net::EthAddr eaddr;
- uint32_t rx_max_copy;
- uint32_t tx_max_copy;
- uint32_t rx_max_intr;
- uint32_t rx_fifo_size;
- uint32_t tx_fifo_size;
- uint32_t rx_fifo_threshold;
- uint32_t rx_fifo_low_mark;
- uint32_t tx_fifo_high_mark;
- uint32_t tx_fifo_threshold;
- Tick dma_read_delay;
- Tick dma_read_factor;
- Tick dma_write_delay;
- Tick dma_write_factor;
- bool rx_thread;
- bool tx_thread;
- bool rss;
- uint32_t virtual_count;
- bool zero_copy;
- bool delay_copy;
- bool virtual_addr;
- };
-
- protected:
- const Params *params() const { return (const Params *)_params; }
-
public:
- Device(Params *params);
+ Device(const Params *p);
~Device();
};
public:
Interface(const std::string &name, Device *d)
- : EtherInt(name), dev(d) { dev->setInterface(this); }
+ : EtherInt(name), dev(d)
+ { }
virtual bool recvPacket(EthPacketPtr pkt) { return dev->recvPacket(pkt); }
virtual void sendDone() { dev->transferDone(); }