MEM: Add port proxies instead of non-structural ports

[gem5.git] / src / dev / uart8250.hh

diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh
index c28200592761c03d5ede441c18164075943875ba..79c31d5cf52d24b37042dc6c35b27ccf82af462a 100644 (file)
--- a/src/dev/uart8250.hh
+++ b/src/dev/uart8250.hh
@@ -38,7 +38,7 @@
 #include "base/range.hh"
 #include "dev/io_device.hh"
 #include "dev/uart.hh"
-
+#include "params/Uart8250.hh"
 
 /* UART8250 Interrupt ID Register
  *  bit 0    Interrupt Pending 0 = true, 1 = false
@@ -65,15 +65,14 @@ const uint8_t UART_LSR_DR   = 0x01;
 const uint8_t UART_MCR_LOOP = 0x10;
 
 
-class SimConsole;
+class Terminal;
 class Platform;
 
 class Uart8250 : public Uart
 {
-
-
   protected:
     uint8_t IER, DLAB, LCR, MCR;
+    Tick lastTxInt;
 
     class IntrEvent : public Event
     {
@@ -83,7 +82,7 @@ class Uart8250 : public Uart
         public:
             IntrEvent(Uart8250 *u, int bit);
             virtual void process();
-            virtual const char *description();
+            virtual const char *description() const;
             void scheduleIntr();
     };
 
@@ -91,13 +90,18 @@ class Uart8250 : public Uart
     IntrEvent rxIntrEvent;
 
   public:
-    Uart8250(Params *p);
+    typedef Uart8250Params Params;
+    const Params *
+    params() const
+    {
+        return dynamic_cast<const Params *>(_params);
+    }
+    Uart8250(const Params *p);
 
     virtual Tick read(PacketPtr pkt);
     virtual Tick write(PacketPtr pkt);
     virtual void addressRanges(AddrRangeList &range_list);
 
-
     /**
      * Inform the uart that there is data available.
      */