base: add the FmtStackTrace debug option

[gem5.git] / src / dev / x86 / I8259.py

diff --git a/src/dev/x86/I8259.py b/src/dev/x86/I8259.py
index a599a5b3ccbafa0805c2acdeaf290a139ff00e48..ef2733a9a0d0fbdd43c292f6417fec658f49b945 100644 (file)
--- a/src/dev/x86/I8259.py
+++ b/src/dev/x86/I8259.py
@@ -28,10 +28,20 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
+from m5.objects.IntPin import IntSourcePin, VectorIntSinkPin
+
+class X86I8259CascadeMode(Enum):
+    map = {'I8259Master' : 0,
+           'I8259Slave' : 1,
+           'I8259Single' : 2
+    }
 
 class I8259(BasicPioDevice):
     type = 'I8259'
     cxx_class='X86ISA::I8259'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
-    master = Param.Bool(True, 'If this PIC is the master or slave')
+    cxx_header = "dev/x86/i8259.hh"
+    output = IntSourcePin('The pin this I8259 drives')
+    inputs = VectorIntSinkPin('The pins that drive this I8259')
+    mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
+    slave = Param.I8259(NULL, 'Slave I8259, if any')