misc: Replaced master/slave terminology

[gem5.git] / src / dev / x86 / i82094aa.hh

diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh
index b11e2bcb128d1c55dc8cda22769eee29e415f03e..a5263b37d65d436bdff8aa27b23e9620c152d520 100644 (file)
--- a/src/dev/x86/i82094aa.hh
+++ b/src/dev/x86/i82094aa.hh
@@ -24,25 +24,26 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
  */
 
 #ifndef __DEV_X86_I82094AA_HH__
 #define __DEV_X86_I82094AA_HH__
 
+#include <map>
+
 #include "base/bitunion.hh"
-#include "base/range_map.hh"
-#include "dev/io_device.hh"
 #include "dev/x86/intdev.hh"
+#include "dev/intpin.hh"
+#include "dev/io_device.hh"
 #include "params/I82094AA.hh"
 
 namespace X86ISA
 {
 
 class I8259;
+class Interrupts;
 
-class I82094AA : public PioDevice, public IntDev
+class I82094AA : public BasicPioDevice
 {
   public:
     BitUnion64(RedirTableEntry)
@@ -62,15 +63,15 @@ class I82094AA : public PioDevice, public IntDev
     EndBitUnion(RedirTableEntry)
 
   protected:
-    Tick latency;
-    Addr pioAddr;
-
     I8259 * extIntPic;
 
     uint8_t regSel;
+    uint8_t initialApicId;
     uint8_t id;
     uint8_t arbId;
 
+    uint64_t lowestPriorityOffset;
+
     static const uint8_t TableSize = 24;
     // This implementation is based on version 0x11, but 0x14 avoids having
     // to deal with the arbitration and APIC bus guck.
@@ -79,6 +80,10 @@ class I82094AA : public PioDevice, public IntDev
     RedirTableEntry redirTable[TableSize];
     bool pinStates[TableSize];
 
+    std::vector<IntSinkPin<I82094AA> *> inputs;
+
+    IntRequestPort<I82094AA> intRequestPort;
+
   public:
     typedef I82094AAParams Params;
 
@@ -90,38 +95,27 @@ class I82094AA : public PioDevice, public IntDev
 
     I82094AA(Params *p);
 
-    Tick read(PacketPtr pkt);
-    Tick write(PacketPtr pkt);
+    void init() override;
 
-    void addressRanges(AddrRangeList &range_list)
-    {
-        range_list.clear();
-        range_list.push_back(RangeEx(pioAddr, pioAddr + 4));
-        range_list.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
-    }
-
-    void getIntAddrRange(AddrRangeList &range_list)
-    {
-        range_list.clear();
-        range_list.push_back(RangeEx(x86InterruptAddress(1, 0),
-                    x86InterruptAddress(1, 0) + PhysAddrAPICRangeSize));
-    }
+    Tick read(PacketPtr pkt) override;
+    Tick write(PacketPtr pkt) override;
 
     void writeReg(uint8_t offset, uint32_t value);
     uint32_t readReg(uint8_t offset);
 
-    Port *getPort(const std::string &if_name, int idx = -1)
-    {
-        if (if_name == "int_port")
-            return intPort;
-        return PioDevice::getPort(if_name, idx);
-    }
+    Port &getPort(const std::string &if_name,
+                  PortID idx=InvalidPortID) override;
+
+    bool recvResponse(PacketPtr pkt);
 
     void signalInterrupt(int line);
     void raiseInterruptPin(int number);
     void lowerInterruptPin(int number);
+
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__