base: add the FmtStackTrace debug option

[gem5.git] / src / dev / x86 / i8254.cc

diff --git a/src/dev/x86/i8254.cc b/src/dev/x86/i8254.cc
index 457db13f7f02d2d371e54302c7de1e9ae8c6683e..b6b639bd4123db385748b8309775f27bbd180467 100644 (file)
--- a/src/dev/x86/i8254.cc
+++ b/src/dev/x86/i8254.cc
@@ -40,9 +40,11 @@ X86ISA::I8254::counterInterrupt(unsigned int num)
 {
     DPRINTF(I8254, "Interrupt from counter %d.\n", num);
     if (num == 0) {
-        intPin->raise();
-        //XXX This is a hack.
-        intPin->lower();
+        for (auto *wire: intPin) {
+            wire->raise();
+            //XXX This is a hack.
+            wire->lower();
+        }
     }
 }
 
@@ -52,9 +54,9 @@ X86ISA::I8254::read(PacketPtr pkt)
     assert(pkt->getSize() == 1);
     Addr offset = pkt->getAddr() - pioAddr;
     if (offset < 3) {
-        pkt->set(pit.readCounter(offset));
+        pkt->setLE(pit.readCounter(offset));
     } else if (offset == 3) {
-        pkt->set(uint8_t(-1));
+        pkt->setLE(uint8_t(-1));
     } else {
         panic("Read from undefined i8254 register.\n");
     }
@@ -68,9 +70,9 @@ X86ISA::I8254::write(PacketPtr pkt)
     assert(pkt->getSize() == 1);
     Addr offset = pkt->getAddr() - pioAddr;
     if (offset < 3) {
-        pit.writeCounter(offset, pkt->get<uint8_t>());
+        pit.writeCounter(offset, pkt->getLE<uint8_t>());
     } else if (offset == 3) {
-        pit.writeControl(pkt->get<uint8_t>());
+        pit.writeControl(pkt->getLE<uint8_t>());
     } else {
         panic("Write to undefined i8254 register.\n");
     }