#include "freedreno_priv.h"
+#include "util/slab.h"
+
#ifndef __user
# define __user
#endif
-#include "msm_drm.h"
+#include "drm-uapi/msm_drm.h"
struct msm_device {
struct fd_device base;
struct fd_pipe base;
uint32_t pipe;
uint32_t gpu_id;
+ uint64_t gmem_base;
uint32_t gmem;
uint32_t chip_id;
uint32_t queue_id;
+ struct slab_parent_pool ring_pool;
};
FD_DEFINE_CAST(fd_pipe, msm_pipe);
struct fd_submit * msm_submit_new(struct fd_pipe *pipe);
struct fd_submit * msm_submit_sp_new(struct fd_pipe *pipe);
+void msm_pipe_sp_ringpool_init(struct msm_pipe *msm_pipe);
+void msm_pipe_sp_ringpool_fini(struct msm_pipe *msm_pipe);
+
+
struct msm_bo {
struct fd_bo base;
uint64_t offset;
- /* to avoid excess hashtable lookups, cache the ring this bo was
- * last emitted on (since that will probably also be the next ring
- * it is emitted on)
- */
- unsigned current_submit_seqno;
uint32_t idx;
};
FD_DEFINE_CAST(fd_bo, msm_bo);
struct drm_msm_gem_submit_reloc *r = &relocs[j];
ERROR_MSG(" reloc[%d]: submit_offset=%u, or=%08x, shift=%d, reloc_idx=%u"
", reloc_offset=%"PRIu64, j, r->submit_offset, r->or, r->shift,
- r->reloc_idx, r->reloc_offset);
+ r->reloc_idx, (uint64_t)r->reloc_offset);
}
}
}
static inline void get_abs_timeout(struct drm_msm_timespec *tv, uint64_t ns)
{
struct timespec t;
- uint32_t s = ns / 1000000000;
clock_gettime(CLOCK_MONOTONIC, &t);
- tv->tv_sec = t.tv_sec + s;
- tv->tv_nsec = t.tv_nsec + ns - (s * 1000000000);
+ tv->tv_sec = t.tv_sec + ns / 1000000000;
+ tv->tv_nsec = t.tv_nsec + ns % 1000000000;
}
/*
(x)->nr_ ## name ++; \
})
+#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
+
#endif /* MSM_PRIV_H_ */