#include "util/bitscan.h"
#include "util/list.h"
+#include "util/set.h"
#include "util/u_debug.h"
#include "instr-a3xx.h"
int off; /* component/offset */
} fo;
struct {
- struct ir3_block *block;
- } inout;
+ /* for sysvals, identifies the sysval type. Mostly so we can
+ * identify the special cases where a sysval should not be DCE'd
+ * (currently, just pre-fs texture fetch)
+ */
+ gl_system_value sysval;
+ } input;
};
/* transient values used during various algorithms: */
struct ir3_instruction *condition;
struct ir3_block *successors[2];
- unsigned predecessors_count;
- struct ir3_block **predecessors;
+ struct set *predecessors; /* set of ir3_block */
uint16_t start_ip, end_ip;
void ir3_print_instr(struct ir3_instruction *instr);
/* depth calculation: */
+struct ir3_shader_variant;
int ir3_delayslots(struct ir3_instruction *assigner,
struct ir3_instruction *consumer, unsigned n);
void ir3_insert_by_depth(struct ir3_instruction *instr, struct list_head *list);
-void ir3_depth(struct ir3 *ir);
+void ir3_depth(struct ir3 *ir, struct ir3_shader_variant *so);
/* copy-propagate: */
-struct ir3_shader_variant;
void ir3_cp(struct ir3 *ir, struct ir3_shader_variant *so);
/* group neighbors and insert mov's to resolve conflicts: */
/* register assignment: */
struct ir3_ra_reg_set * ir3_ra_alloc_reg_set(struct ir3_compiler *compiler);
-int ir3_ra(struct ir3 *ir3, gl_shader_stage type,
- bool frag_coord, bool frag_face);
+int ir3_ra(struct ir3_shader_variant *v, struct ir3_instruction **precolor, unsigned nprecolor);
/* legalize: */
void ir3_legalize(struct ir3 *ir, bool *has_ssbo, bool *need_pixlod, int *max_bary);
INSTR0(JUMP)
INSTR1(KILL)
INSTR0(END)
+INSTR0(CHSH)
+INSTR0(CHMASK)
/* cat2 instructions, most 2 src but some 1 src: */
INSTR2(ADD_F)
/* cat6 instructions: */
INSTR2(LDLV)
-INSTR2(LDG)
-INSTR2(LDL)
+INSTR3(LDG)
+INSTR3(LDL)
+INSTR3(LDLW)
INSTR3(STG)
INSTR3(STL)
+INSTR3(STLW)
INSTR1(RESINFO)
INSTR1(RESFMT)
INSTR2(ATOMIC_ADD)