freedreno/afuc: Fix printing preemptleave on a5xx

[mesa.git] / src / freedreno / ir3 / ir3.h

diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index 772191d965c9c70ee2e8c1cc72c17d37251ef7b7..cb42636f285c3096c68d8158b7c15fdce5d24752 100644 (file)
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -65,6 +65,9 @@ struct ir3_info {
        uint16_t sstall;
 
        uint16_t last_baryf;     /* instruction # of last varying fetch */
+
+       /* Number of instructions of a given category: */
+       uint16_t instrs_per_cat[8];
 };
 
 struct ir3_register {
@@ -631,19 +634,6 @@ bool ir3_valid_flags(struct ir3_instruction *instr, unsigned n, unsigned flags);
                set_foreach ((__instr)->uses, __entry) \
                        if ((__use = (void *)__entry->key))
 
-#define MAX_ARRAYS 16
-
-/* comp:
- *   0 - x
- *   1 - y
- *   2 - z
- *   3 - w
- */
-static inline uint32_t regid(int num, int comp)
-{
-       return (num << 2) | (comp & 0x3);
-}
-
 static inline uint32_t reg_num(struct ir3_register *reg)
 {
        return reg->num >> 2;
@@ -654,10 +644,6 @@ static inline uint32_t reg_comp(struct ir3_register *reg)
        return reg->num & 0x3;
 }
 
-#define INVALID_REG      regid(63, 0)
-#define VALIDREG(r)      ((r) != INVALID_REG)
-#define CONDREG(r, val)  COND(VALIDREG(r), (val))
-
 static inline bool is_flow(struct ir3_instruction *instr)
 {
        return (opc_cat(instr->opc) == 0);
@@ -1426,14 +1412,14 @@ create_uniform(struct ir3_block *block, unsigned n)
 }
 
 static inline struct ir3_instruction *
-create_uniform_indirect(struct ir3_block *block, int n,
+create_uniform_indirect(struct ir3_block *block, int n, type_t type,
                struct ir3_instruction *address)
 {
        struct ir3_instruction *mov;
 
        mov = ir3_instr_create(block, OPC_MOV);
-       mov->cat1.src_type = TYPE_U32;
-       mov->cat1.dst_type = TYPE_U32;
+       mov->cat1.src_type = type;
+       mov->cat1.dst_type = type;
        __ssa_dst(mov);
        ir3_reg_create(mov, 0, IR3_REG_CONST | IR3_REG_RELATIV)->array.offset = n;
 
@@ -1757,113 +1743,37 @@ INSTR0(FENCE)
 INSTR0(META_TEX_PREFETCH);
 
 /* ************************************************************************* */
-/* split this out or find some helper to use.. like main/bitset.h.. */
-
-#include <string.h>
-#include "util/bitset.h"
-
-#define MAX_REG 256
-
-typedef BITSET_DECLARE(regmaskstate_t, 2 * MAX_REG);
-
-typedef struct {
-       bool mergedregs;
-       regmaskstate_t mask;
-} regmask_t;
-
-static inline bool
-__regmask_get(regmask_t *regmask, struct ir3_register *reg, unsigned n)
-{
-       if (regmask->mergedregs) {
-               /* a6xx+ case, with merged register file, we track things in terms
-                * of half-precision registers, with a full precisions register
-                * using two half-precision slots:
-                */
-               if (reg->flags & IR3_REG_HALF) {
-                       return BITSET_TEST(regmask->mask, n);
-               } else {
-                       n *= 2;
-                       return BITSET_TEST(regmask->mask, n) ||
-                               BITSET_TEST(regmask->mask, n+1);
-               }
-       } else {
-               /* pre a6xx case, with separate register file for half and full
-                * precision:
-                */
-               if (reg->flags & IR3_REG_HALF)
-                       n += MAX_REG;
-               return BITSET_TEST(regmask->mask, n);
-       }
-}
-
-static inline void
-__regmask_set(regmask_t *regmask, struct ir3_register *reg, unsigned n)
-{
-       if (regmask->mergedregs) {
-               /* a6xx+ case, with merged register file, we track things in terms
-                * of half-precision registers, with a full precisions register
-                * using two half-precision slots:
-                */
-               if (reg->flags & IR3_REG_HALF) {
-                       BITSET_SET(regmask->mask, n);
-               } else {
-                       n *= 2;
-                       BITSET_SET(regmask->mask, n);
-                       BITSET_SET(regmask->mask, n+1);
-               }
-       } else {
-               /* pre a6xx case, with separate register file for half and full
-                * precision:
-                */
-               if (reg->flags & IR3_REG_HALF)
-                       n += MAX_REG;
-               BITSET_SET(regmask->mask, n);
-       }
-}
-
-static inline void regmask_init(regmask_t *regmask, bool mergedregs)
-{
-       memset(&regmask->mask, 0, sizeof(regmask->mask));
-       regmask->mergedregs = mergedregs;
-}
+#include "regmask.h"
 
 static inline void regmask_set(regmask_t *regmask, struct ir3_register *reg)
 {
+       bool half = reg->flags & IR3_REG_HALF;
        if (reg->flags & IR3_REG_RELATIV) {
                for (unsigned i = 0; i < reg->size; i++)
-                       __regmask_set(regmask, reg, reg->array.offset + i);
+                       __regmask_set(regmask, half, reg->array.offset + i);
        } else {
                for (unsigned mask = reg->wrmask, n = reg->num; mask; mask >>= 1, n++)
                        if (mask & 1)
-                               __regmask_set(regmask, reg, n);
+                               __regmask_set(regmask, half, n);
        }
 }
 
-static inline void regmask_or(regmask_t *dst, regmask_t *a, regmask_t *b)
-{
-       assert(dst->mergedregs == a->mergedregs);
-       assert(dst->mergedregs == b->mergedregs);
-
-       for (unsigned i = 0; i < ARRAY_SIZE(dst->mask); i++)
-               dst->mask[i] = a->mask[i] | b->mask[i];
-}
-
 static inline bool regmask_get(regmask_t *regmask,
                struct ir3_register *reg)
 {
+       bool half = reg->flags & IR3_REG_HALF;
        if (reg->flags & IR3_REG_RELATIV) {
                for (unsigned i = 0; i < reg->size; i++)
-                       if (__regmask_get(regmask, reg, reg->array.offset + i))
+                       if (__regmask_get(regmask, half, reg->array.offset + i))
                                return true;
        } else {
                for (unsigned mask = reg->wrmask, n = reg->num; mask; mask >>= 1, n++)
                        if (mask & 1)
-                               if (__regmask_get(regmask, reg, n))
+                               if (__regmask_get(regmask, half, n))
                                        return true;
        }
        return false;
 }
-
 /* ************************************************************************* */
 
 #endif /* IR3_H_ */