freedreno/ir3: force i/j pixel to r0.x

[mesa.git] / src / freedreno / ir3 / ir3_compiler_nir.c

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 13158dd063792d480e35e1e3e3e92cef25c39574..5b1adf29e3dcc7877dd433278933fd666e305099 100644 (file)
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -68,7 +68,7 @@ create_input_compmask(struct ir3_context *ctx, unsigned n, unsigned compmask)
        struct ir3_instruction *in;
 
        in = ir3_instr_create(ctx->in_block, OPC_META_INPUT);
-       in->inout.block = ctx->in_block;
+       in->input.sysval = ~0;
        ir3_reg_create(in, n, 0);
 
        in->regs[0]->wrmask = compmask;
@@ -1198,6 +1198,9 @@ static void add_sysval_input_compmask(struct ir3_context *ctx,
        unsigned r = regid(so->inputs_count, 0);
        unsigned n = so->inputs_count++;
 
+       assert(instr->opc == OPC_META_INPUT);
+       instr->input.sysval = slot;
+
        so->inputs[n].sysval = true;
        so->inputs[n].slot = slot;
        so->inputs[n].compmask = compmask;
@@ -2632,6 +2635,16 @@ pack_inlocs(struct ir3_context *ctx)
                                compile_assert(ctx, i < so->inputs_count);
 
                                used_components[i] |= 1 << j;
+                       } else if (instr->opc == OPC_META_TEX_PREFETCH) {
+                               for (int n = 0; n < 2; n++) {
+                                       unsigned inloc = instr->prefetch.input_offset + n;
+                                       unsigned i = inloc / 4;
+                                       unsigned j = inloc % 4;
+
+                                       compile_assert(ctx, i < so->inputs_count);
+
+                                       used_components[i] |= 1 << j;
+                               }
                        }
                }
        }
@@ -3139,7 +3152,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
                ir3_print(ir);
        }
 
-       ir3_depth(ir);
+       ir3_depth(ir, so);
 
        if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
                printf("AFTER DEPTH:\n");
@@ -3198,6 +3211,28 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
                ctx->primitive_id->regs[0]->num = 1;
                struct ir3_instruction *precolor[] = { ctx->gs_header, ctx->primitive_id };
                ret = ir3_ra(so, precolor, ARRAY_SIZE(precolor));
+       } else if (so->num_sampler_prefetch) {
+               assert(so->type == MESA_SHADER_FRAGMENT);
+               struct ir3_instruction *precolor[2];
+               int idx = 0;
+
+               for (unsigned i = 0; i < ir->ninputs; i++) {
+                       struct ir3_instruction *instr = ctx->ir->inputs[i];
+
+                       if (!instr)
+                               continue;
+
+                       if (instr->input.sysval != SYSTEM_VALUE_BARYCENTRIC_PIXEL)
+                               continue;
+
+                       assert(idx < ARRAY_SIZE(precolor));
+
+                       precolor[idx] = instr;
+                       instr->regs[0]->num = idx;
+
+                       idx++;
+               }
+               ret = ir3_ra(so, precolor, idx);
        } else {
                ret = ir3_ra(so, NULL, 0);
        }