freedreno/ir3: re-indent comment

[mesa.git] / src / freedreno / ir3 / ir3_compiler_nir.c

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 590b9455288cf2fe93e4ee8c40611f1b0d4f274b..afab76ab8c8c491c3c436e66d7e98d503072b809 100644 (file)
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -681,8 +681,10 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
        struct ir3_block *b = ctx->block;
        struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1;
        nir_const_value *const_offset;
-       /* UBO addresses are the first driver params: */
-       unsigned ubo = regid(ctx->so->constbase.ubo, 0);
+       /* UBO addresses are the first driver params, but subtract 2 here to
+        * account for nir_lower_uniforms_to_ubo rebasing the UBOs such that UBO 0
+        * is the uniforms: */
+       unsigned ubo = regid(ctx->so->constbase.ubo, 0) - 2;
        const unsigned ptrsz = ir3_pointer_size(ctx);
 
        int off = 0;
@@ -1151,15 +1153,13 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                if (const_offset) {
                        idx += const_offset->u32[0];
                        for (int i = 0; i < intr->num_components; i++) {
-                               unsigned n = idx * 4 + i;
-                               dst[i] = create_uniform(b, n);
+                               dst[i] = create_uniform(b, idx + i);
                        }
                } else {
                        src = ir3_get_src(ctx, &intr->src[0]);
                        for (int i = 0; i < intr->num_components; i++) {
-                               int n = idx * 4 + i;
-                               dst[i] = create_uniform_indirect(b, n,
-                                               ir3_get_addr(ctx, src[0], 4));
+                               dst[i] = create_uniform_indirect(b, idx + i,
+                                               ir3_get_addr(ctx, src[0], 1));
                        }
                        /* NOTE: if relative addressing is used, we set
                         * constlen in the compiler (to worst-case value)
@@ -1194,14 +1194,17 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                        }
                }
                break;
-               /* All SSBO intrinsics should have been lowered by 'lower_io_offsets'
-                * pass and replaced by an ir3-specifc version that adds the
-                * dword-offset in the last source.
-                */
+       /* All SSBO intrinsics should have been lowered by 'lower_io_offsets'
+        * pass and replaced by an ir3-specifc version that adds the
+        * dword-offset in the last source.
+        */
        case nir_intrinsic_load_ssbo_ir3:
                ctx->funcs->emit_intrinsic_load_ssbo(ctx, intr, dst);
                break;
        case nir_intrinsic_store_ssbo_ir3:
+               if ((ctx->so->type == MESA_SHADER_FRAGMENT) &&
+                               !ctx->s->info.fs.early_fragment_tests)
+                       ctx->so->no_earlyz = true;
                ctx->funcs->emit_intrinsic_store_ssbo(ctx, intr);
                break;
        case nir_intrinsic_get_buffer_size:
@@ -1217,6 +1220,9 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
        case nir_intrinsic_ssbo_atomic_xor_ir3:
        case nir_intrinsic_ssbo_atomic_exchange_ir3:
        case nir_intrinsic_ssbo_atomic_comp_swap_ir3:
+               if ((ctx->so->type == MESA_SHADER_FRAGMENT) &&
+                               !ctx->s->info.fs.early_fragment_tests)
+                       ctx->so->no_earlyz = true;
                dst[0] = ctx->funcs->emit_intrinsic_atomic_ssbo(ctx, intr);
                break;
        case nir_intrinsic_load_shared:
@@ -1241,6 +1247,9 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                emit_intrinsic_load_image(ctx, intr, dst);
                break;
        case nir_intrinsic_image_deref_store:
+               if ((ctx->so->type == MESA_SHADER_FRAGMENT) &&
+                               !ctx->s->info.fs.early_fragment_tests)
+                       ctx->so->no_earlyz = true;
                ctx->funcs->emit_intrinsic_store_image(ctx, intr);
                break;
        case nir_intrinsic_image_deref_size:
@@ -1254,6 +1263,9 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
        case nir_intrinsic_image_deref_atomic_xor:
        case nir_intrinsic_image_deref_atomic_exchange:
        case nir_intrinsic_image_deref_atomic_comp_swap:
+               if ((ctx->so->type == MESA_SHADER_FRAGMENT) &&
+                               !ctx->s->info.fs.early_fragment_tests)
+                       ctx->so->no_earlyz = true;
                dst[0] = ctx->funcs->emit_intrinsic_atomic_image(ctx, intr);
                break;
        case nir_intrinsic_barrier:
@@ -1395,7 +1407,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                array_insert(ctx->ir, ctx->ir->predicates, kill);
 
                array_insert(b, b->keeps, kill);
-               ctx->so->has_kill = true;
+               ctx->so->no_earlyz = true;
 
                break;
        }
@@ -2426,7 +2438,7 @@ emit_instructions(struct ir3_context *ctx)
         */
        ninputs += max_sysvals[ctx->so->type];
 
-       ctx->ir = ir3_create(ctx->compiler, ninputs, noutputs);
+       ctx->ir = ir3_create(ctx->compiler, ctx->so->type, ninputs, noutputs);
 
        /* Create inputs in first block: */
        ctx->block = get_block(ctx, nir_start_block(fxn));
@@ -2786,7 +2798,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
        /* We need to do legalize after (for frag shader's) the "bary.f"
         * offsets (inloc) have been assigned.
         */
-       ir3_legalize(ir, &so->has_ssbo, &max_bary);
+       ir3_legalize(ir, &so->has_ssbo, &so->need_pixlod, &max_bary);
 
        if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
                printf("AFTER LEGALIZE:\n");