freedreno/ir3: enable pre-fs texture fetch for a6xx

[mesa.git] / src / freedreno / ir3 / ir3_context.c

diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c
index dc9ed10d84496a302cd93b8b09780e7b96e22155..a75bbfa1effabeb559a0339b4898e619cccf9571 100644 (file)
--- a/src/freedreno/ir3/ir3_context.c
+++ b/src/freedreno/ir3/ir3_context.c
@@ -96,6 +96,12 @@ ir3_context_init(struct ir3_compiler *compiler,
                NIR_PASS_V(ctx->s, nir_opt_constant_folding);
        }
 
+       /* Enable the texture pre-fetch feature only a4xx onwards.  But
+        * only enable it on generations that have been tested:
+        */
+       if ((so->type == MESA_SHADER_FRAGMENT) && (compiler->gpu_id >= 600))
+               NIR_PASS_V(ctx->s, ir3_nir_lower_tex_prefetch);
+
        NIR_PASS_V(ctx->s, nir_convert_from_ssa, true);
 
        if (ir3_shader_debug & IR3_DBG_DISASM) {
@@ -530,8 +536,11 @@ ir3_create_array_store(struct ir3_context *ctx, struct ir3_array *arr, int n,
 
        /* if not relative store, don't create an extra mov, since that
         * ends up being difficult for cp to remove.
+        *
+        * Also, don't skip the mov if the src is meta (like fanout/split),
+        * since that creates a situation that RA can't really handle properly.
         */
-       if (!address) {
+       if (!address && !is_meta(src)) {
                dst = src->regs[0];
 
                src->barrier_class |= IR3_BARRIER_ARRAY_W;