radeonsi/gfx10: implement most performance counters

[mesa.git] / src / freedreno / ir3 / ir3_context.h

diff --git a/src/freedreno/ir3/ir3_context.h b/src/freedreno/ir3/ir3_context.h
index a109a9a13be46db0c7e3f4ffa7a0174c592fc452..659303de9e17be25548fd3b0ba5e2e4605a785d0 100644 (file)
--- a/src/freedreno/ir3/ir3_context.h
+++ b/src/freedreno/ir3/ir3_context.h
@@ -127,6 +127,8 @@ struct ir3_context {
         */
        struct hash_table_u64 *addr1_ht;
 
+       struct hash_table *sel_cond_conversions;
+
        /* last dst array, for indirect we need to insert a var-store.
         */
        struct ir3_instruction **last_dst;
@@ -144,6 +146,8 @@ struct ir3_context {
 
        unsigned max_texture_index;
 
+       unsigned prefetch_limit;
+
        /* set if we encounter something we can't handle yet, so we
         * can bail cleanly and fallback to TGSI compiler f/e
         */