radeonsi/gfx10: implement most performance counters

[mesa.git] / src / freedreno / ir3 / ir3_context.h

diff --git a/src/freedreno/ir3/ir3_context.h b/src/freedreno/ir3/ir3_context.h
index c5845d4e2c6e124438545e07a307861df6f603f6..659303de9e17be25548fd3b0ba5e2e4605a785d0 100644 (file)
--- a/src/freedreno/ir3/ir3_context.h
+++ b/src/freedreno/ir3/ir3_context.h
@@ -120,7 +120,14 @@ struct ir3_context {
         * src used for an array of vec1 cannot be also used for an
         * array of vec4.
         */
-       struct hash_table *addr_ht[4];
+       struct hash_table *addr0_ht[4];
+
+       /* The same for a1.x. We only support immediate values for a1.x, as this
+        * is the only use so far.
+        */
+       struct hash_table_u64 *addr1_ht;
+
+       struct hash_table *sel_cond_conversions;
 
        /* last dst array, for indirect we need to insert a var-store.
         */
@@ -139,6 +146,8 @@ struct ir3_context {
 
        unsigned max_texture_index;
 
+       unsigned prefetch_limit;
+
        /* set if we encounter something we can't handle yet, so we
         * can bail cleanly and fallback to TGSI compiler f/e
         */
@@ -150,6 +159,8 @@ struct ir3_context_funcs {
                        struct ir3_instruction **dst);
        void (*emit_intrinsic_store_ssbo)(struct ir3_context *ctx, nir_intrinsic_instr *intr);
        struct ir3_instruction * (*emit_intrinsic_atomic_ssbo)(struct ir3_context *ctx, nir_intrinsic_instr *intr);
+       void (*emit_intrinsic_load_image)(struct ir3_context *ctx, nir_intrinsic_instr *intr,
+                       struct ir3_instruction **dst);
        void (*emit_intrinsic_store_image)(struct ir3_context *ctx, nir_intrinsic_instr *intr);
        struct ir3_instruction * (*emit_intrinsic_atomic_image)(struct ir3_context *ctx, nir_intrinsic_instr *intr);
 };
@@ -176,8 +187,10 @@ NORETURN void ir3_context_error(struct ir3_context *ctx, const char *format, ...
                if (!(cond)) ir3_context_error((ctx), "failed assert: "#cond"\n"); \
        } while (0)
 
-struct ir3_instruction * ir3_get_addr(struct ir3_context *ctx,
+struct ir3_instruction * ir3_get_addr0(struct ir3_context *ctx,
                struct ir3_instruction *src, int align);
+struct ir3_instruction * ir3_get_addr1(struct ir3_context *ctx,
+               unsigned const_val);
 struct ir3_instruction * ir3_get_predicate(struct ir3_context *ctx,
                struct ir3_instruction *src);